1 /*******************************************************************
2 Components for embedded applications builded for
3 laboratory and medical instruments firmware
5 system_def.h - common cover for definition of hardware adresses,
6 registers, timing and other hardware dependant
7 parts of embedded hardware
9 Copyright (C) 2001 by Pavel Pisa pisa@cmp.felk.cvut.cz
10 (C) 2002 by PiKRON Ltd. http://www.pikron.com
12 *******************************************************************/
14 #ifndef _SYSTEM_DEF_H_
15 #define _SYSTEM_DEF_H_
18 #include <system_stub.h>
28 #define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch)
29 /* Software version */
30 #define SW_VER_ID "UL_USB"
31 #define SW_VER_MAJOR 0
32 #define SW_VER_MINOR 2
33 #define SW_VER_PATCH 0
34 #define SW_VER_CODE VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH)
35 /* Hardware version */
36 #define HW_VER_ID "UL_USB"
37 #define HW_VER_MAJOR 1
38 #define HW_VER_MINOR 0
39 #define HW_VER_PATCH 0
40 #define HW_VER_CODE VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH)
41 /* Version of mechanical */
42 #define MECH_VER_ID "UL_USB"
43 #define MECH_VER_MAJOR 0
44 #define MECH_VER_MINOR 0
45 #define MECH_VER_PATCH 0
46 #define MECH_VER_CODE VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH)
49 // PLL setup values are computed within the LPC include file
50 // It relies upon the following defines
51 //#define FOSC (11059200) // Master Oscillator Freq.
52 #define FOSC (12000000) // Master Oscillator Freq.
53 #define PLL_MUL (4) // PLL Multiplier
54 #define CCLK (FOSC * PLL_MUL) // CPU Clock Freq.
56 // Pheripheral Bus Speed Divider
57 #define PBSD 1 // MUST BE 1, 2, or 4
58 #define PCLK (CCLK / PBSD) // Pheripheal Bus Clock Freq.
60 #define SYS_TIMER_HZ 1000
63 #define BIT(n) (1 << (n))
66 // Port Bit Definitions & Macros: Description - initial conditions
67 #define TXD0_BIT BIT(0) // used by UART0
68 #define RXD0_BIT BIT(1) // used by UART0
69 #define P0_SCL0_PIN BIT(2) // I2C 0 SCL
70 #define P0_SDA0_PIN BIT(3) // I2C 0 SDA
71 #define P0_SCK0_PIN BIT(4) // SPI0 clocks
72 #define P0_MISO0_PIN BIT(5) // SPI0 master input
73 #define P0_MOSI0_PIN BIT(6) // SPI0 master output
74 #define P0_SSEL0_PIN BIT(7) // SPI0 external select/ADS1218 DRDY
75 #define TXD1_BIT BIT(8) // used by UART1
76 #define RXD1_BIT BIT(9) // used by UART1
77 #define RTS1_BIT BIT(10) // used by UART1
78 #define CTS1_BIT BIT(11) // used by UART1
79 #define DSR1_BIT BIT(12) // used by UART1
80 #define LED2_BIT BIT(13) // used by LED
81 #define BOOT_BIT BIT(14) // SWITCH
82 #define LED1_BIT BIT(15) // used by LED
83 #define P0_SWITCH1_PIN BIT(16) // pin connected to the switch 1
84 #define P0_SCK1_PIN BIT(17) // SPI1 clocks
85 #define P0_MISO1_PIN BIT(18) // SPI1 master input
86 #define P0_MOSI1_PIN BIT(19) // SPI1 master output
87 #define P0_SSEL1_PIN BIT(20) // SPI1 slave select/25VF016 chipselect
88 #define P0_21_UNUSED_BIT BIT(21) // P0.21 unused - low output
89 #define P0_22_UNUSED_BIT BIT(22) // P0.22 unused - low output
90 #define P0_SJA1000_ALE_PIN BIT(23) // SJA1000 ALE
91 #define P0_24_UNUSED_BIT BIT(24) // P0.24 unused - low output
92 #define P0_SJA1000_CS_PIN BIT(25) // SJA1000 CS
93 #define P0_26_UNUSED_BIT BIT(26) // P0.26 unused - low output
94 #define P0_27_UNUSED_BIT BIT(27) // P0.27 unused - low output
95 #define P0_SJA1000_RD_PIN BIT(28) // SJA1000 RD
96 #define P0_SJA1000_WR_PIN BIT(29) // SJA1000 WR
97 #define P0_SJA1000_INT_PIN BIT(30) // SJA1000 INT
98 #define P0_USB_CONNECT_PIN BIT(31) // USB Connect Control
100 #define P1_SJA1000_D0_PIN BIT(16) // SJA1000 D0
101 #define P1_SJA1000_D1_PIN BIT(17) // SJA1000 D1
102 #define P1_SJA1000_D2_PIN BIT(18) // SJA1000 D2
103 #define P1_SJA1000_D3_PIN BIT(19) // SJA1000 D3
104 #define P1_SJA1000_D4_PIN BIT(20) // SJA1000 D4
105 #define P1_SJA1000_D5_PIN BIT(21) // SJA1000 D5
106 #define P1_SJA1000_D6_PIN BIT(22) // SJA1000 D6
107 #define P1_SJA1000_D7_PIN BIT(23) // SJA1000 D7
108 #define P1_OUT_PORT_CS_PIN BIT(24) // Chip select for 74HC574 chip
109 #define P1_SJA1000_RST_PIN BIT(25) // SJA1000 RST
110 #define P1_26_UNUSED_BIT BIT(26) // used by JTAG
111 #define P1_27_UNUSED_BIT BIT(27) // used by JTAG
112 #define P1_28_UNUSED_BIT BIT(28) // used by JTAG
113 #define P1_29_UNUSED_BIT BIT(29) // used by JTAG
114 #define P1_30_UNUSED_BIT BIT(30) // used by JTAG
115 #define P1_31_UNUSED_BIT BIT(31) // used by JTAG
117 #define P1_SJA1000_DATA_PINS (uint32_t) ( \
118 P1_SJA1000_D0_PIN | \
119 P1_SJA1000_D1_PIN | \
120 P1_SJA1000_D2_PIN | \
121 P1_SJA1000_D3_PIN | \
122 P1_SJA1000_D4_PIN | \
123 P1_SJA1000_D5_PIN | \
124 P1_SJA1000_D6_PIN | \
125 P1_SJA1000_D7_PIN | \
128 #define P0IO_INPUT_BITS (uint32_t) ( \
136 P0_SJA1000_INT_PIN | \
139 #define P1IO_INPUT_BITS (uint32_t) ( \
148 #define P0IO_ZERO_BITS (uint32_t) ( \
154 P0_USB_CONNECT_PIN | \
157 #define P1IO_ZERO_BITS (uint32_t) ( \
158 P1_SJA1000_DATA_PINS | \
159 P1_SJA1000_RST_PIN | \
163 #define P0IO_ONE_BITS (uint32_t) ( \
172 P0_SJA1000_ALE_PIN | \
173 P0_SJA1000_CS_PIN | \
174 P0_SJA1000_RD_PIN | \
175 P0_SJA1000_WR_PIN | \
178 #define P1IO_ONE_BITS (uint32_t) ( \
179 P1_OUT_PORT_CS_PIN | \
182 #define P0IO_OUTPUT_BITS (uint32_t) ( \
186 #define P1IO_OUTPUT_BITS (uint32_t) ( \
190 /***************************************************************************/
192 #define LED_GP LED1_BIT /* GENREAL PURPOSE LED */
193 #define LED_ERR LED2_BIT
195 #define LED_YELLOW LED1_BIT
196 #define LED_RED LED2_BIT
198 /***************************************************************************/
204 #define CREATE_PORT_NAME_PIN(port) port##PIN
205 #define CREATE_PORT_NAME_CLR(port) port##CLR
206 #define CREATE_PORT_NAME_SET(port) port##SET
208 #define GET_IN_PIN(port,in) ((CREATE_PORT_NAME_PIN(port) & in)?1:0)
209 #define SET_OUT_PIN(port,out) (CREATE_PORT_NAME_SET(port)=out)
210 #define CLR_OUT_PIN(port,out) (CREATE_PORT_NAME_CLR(port)=out)
212 /***************************************************************************/
214 //#define WATCHDOG_ENABLED
215 #define WATCHDOG_TIMEOUT_MS 1000
217 /***************************************************************************/
218 /* uLan configuration */
224 #ifdef ULD_DEFAULT_BUFFER_SIZE
225 #undef ULD_DEFAULT_BUFFER_SIZE
226 #define ULD_DEFAULT_BUFFER_SIZE 0x0800
229 #define UL_DRV_SYSLESS_PORT 0xE0010000
230 #define UL_DRV_SYSLESS_BAUD 19200
231 #define UL_DRV_SYSLESS_IRQ HAL_INTERRUPT_UART1
232 #define UL_DRV_SYSLESS_MY_ADR_DEFAULT 1
234 #define watchdog_feed lpc_watchdog_feed
235 #define kvpb_erase lpcisp_kvpb_erase
236 #define kvpb_copy lpcisp_kvpb_copy
237 #define kvpb_flush lpcisp_kvpb_flush
238 #define KVPB_DEFAULT_FLAGS KVPB_DESC_DOUBLE|KVPB_DESC_CHUNKWO
240 /***************************************************************************/
241 /* USB configuration */
242 #define USB_WITH_UDEV_FNC
243 #define USB_EP_NUM 32
244 #define USB_MAX_PACKET0 64
245 #define USB_MAX_PACKET 8
246 #define USB_DMA_EP 0x00000000
248 /***************************************************************************/
249 /* i2c0 configuration */
250 #define I2C_DRV_SYSLESS_IRQ HAL_INTERRUPT_I2C0
251 #define I2C_DRV_SYSLESS_PORT 0xE001C000
252 #define I2C_DRV_SYSLESS_BITRATE 100000
253 #define I2C_DRV_SYSLESS_SLADR 0
255 /***************************************************************************/
256 /* Constants for JTAG and supply control port pins: */
257 #define JTAGIN (IO0PIN) // Control ports are on P5.x
258 #define JTAGSET (IO0SET)
259 #define JTAGCLR (IO0CLR)
260 #define JTAGDIR (IO0DIR)
261 #define JTAGOUT_RDBACK (IO0PIN) // used to read actual TCLK output value
263 #define TMS_PIN (1<<20) // P0.20 JTAG TMS input pin
264 #define TDI_PIN (1<<19) // P0.19 JTAG TDI input pin (SIMO1 if SPI mode)
265 #define TDO_PIN (1<<18) // P0.18 JTAG TDO output pin (SOMI1 if SPI mode)
266 #define TCK_PIN (1<<17) // P0.17 JTAG TCK input pin (UCLK1 if SPI mode)
267 #define TDICTRL2_PIN 0 // Px.x switch TDO to TDI
268 #define TDICTRL1_PIN 0 // Px.x connects TDI
269 #define TEST_PIN 0 // Px.x TEST pin (20 & 28-pin devices only)
270 #define VCCTGT_PIN 0 // Px.x Supply voltage of target board
271 #define TCLK_PIN TDI_PIN // P7.3 TDI (former XOUT) receives TCLK
273 #define ClrTMS() do {(JTAGCLR) |= (TMS_PIN);} while(0);
274 #define SetTMS() do {(JTAGSET) |= (TMS_PIN);} while(0);
275 #define ClrTDI() do {(JTAGCLR) |= (TDI_PIN);} while(0);
276 #define SetTDI() do {(JTAGSET) |= (TDI_PIN);} while(0);
277 #define ClrTCK() do {(JTAGCLR) |= (TCK_PIN);} while(0);
278 #define SetTCK() do {(JTAGSET) |= (TCK_PIN);} while(0);
279 #define ClrTCLK() do {(JTAGCLR) |= (TCLK_PIN);} while(0);
280 #define SetTCLK() do {(JTAGSET) |= (TCLK_PIN);} while(0);
281 #define StoreTCLK() ((JTAGOUT_RDBACK & TCLK_PIN) ? 1:0)
282 #define RestoreTCLK(x) (x == 0 ? (JTAGCLR |= TCLK_PIN) : (JTAGSET |= TCLK_PIN))
283 #define ScanTDO() ((JTAGIN & TDO_PIN)) // assumes TDO to be bit0
285 #define JTAG_IODELAY() __asm__ __volatile__ ("nop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n": : )
287 /****************************************************************************/
288 /* Define section for user, related to the controller used (here MSP430F149)*/
289 /****************************************************************************/
291 // Constants for Error LED control port:
292 #define JTAGLEDSET (IO0SET) // LED ports are P0.x
293 #define JTAGLEDCLR (IO0CLR) // LED ports are P0.x
294 #define JTAGLEDDIR (IO0DIR)
295 #undef JTAGLEDSEL /*P1SEL*/
296 #define JTAGLEDRED (1<<13) // P0.13 Red LED (ERROR)
297 #define JTAGLEDGREEN (1<<15) // P0.15 Green LED (OK)
299 #endif /* _SYSTEM_DEF_H_ */