]> rtime.felk.cvut.cz Git - jailhouse.git/commitdiff
config, core: Improve irqchip configuration
authorJan Kiszka <jan.kiszka@siemens.com>
Sat, 25 Jun 2016 15:59:35 +0000 (17:59 +0200)
committerJan Kiszka <jan.kiszka@siemens.com>
Sun, 26 Jun 2016 07:16:28 +0000 (09:16 +0200)
This aims at supporting irqchips with more than 64 pins. The idea is to
use multiple entries in this case, each describing a distinct set of the
pins. Therefore, a pin_base field is introduced to jailhouse_irqchip.
Moreover, we expand the number of pins for each entry to 128.

We do not exploit the extended pin number on ARM yet, but stick with
64 pins for now. Succeeding change sets will tackle it.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
13 files changed:
configs/bananapi.c
configs/f2a88xm-hd3.c
configs/h87i.c
configs/imb-a180.c
configs/ioapic-demo.c
configs/jetson-tk1.c
configs/qemu-vm.c
configs/vexpress-linux-demo.c
configs/vexpress.c
hypervisor/arch/arm/irqchip.c
hypervisor/arch/x86/ioapic.c
hypervisor/include/jailhouse/cell-config.h
tools/root-cell-config.c.tmpl

index d81668e7b5ed51cadeb57d97537a013d558567ee..7efb394f29c9df7e38a0a68ae08c1638dc3757de 100644 (file)
@@ -164,7 +164,10 @@ struct {
        .irqchips = {
                /* GIC */ {
                        .address = 0x2f000000,
-                       .pin_bitmap = 0xffffffffffffffff,
+                       .pin_base = 32,
+                       .pin_bitmap = {
+                               0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
+                       },
                },
        },
 
index a0be03f1944857b0aa74282e209acb82dae774d7..321d148dfa8dd20085f716eb9323aadfe41dca7b 100644 (file)
@@ -334,13 +334,17 @@ struct {
                {
                        .address = 0xfec00000,
                        .id = 0x0,
-                       .pin_bitmap = 0xffffff,
+                       .pin_bitmap = {
+                               0xffffff
+                       },
                },
                /* IOAPIC 1, GSI base 24 */
                {
                        .address = 0xfec01000,
                        .id = 0x0,
-                       .pin_bitmap = 0xffffff,
+                       .pin_bitmap = {
+                               0xffffff
+                       },
                },
        },
 
index 5869fb112820374cce1090d6bf6429f5ba57a40a..f281a34bed82d369a5b77d3eff04bc31ebb4a5d4 100644 (file)
@@ -128,7 +128,9 @@ struct {
                /* IOAPIC */ {
                        .address = 0xfec00000,
                        .id = 0x1f0f8,
-                       .pin_bitmap = 0xffffff,
+                       .pin_bitmap = {
+                               0xffffff
+                       },
                },
        },
 
index 45d7ca592d25f051a6f08e207d7e59dae483f723..5d25f5cffc79550dc49c1679f1f5b2e1f4f28163 100644 (file)
@@ -371,7 +371,9 @@ struct {
                /* IOAPIC */ {
                        .address = 0xfec00000,
                        .id = 0x0,
-                       .pin_bitmap = 0xffffff,
+                       .pin_bitmap = {
+                               0xffffff
+                       },
                },
        },
 
index fa450d27d16aec63a5d469bf8d48cd769c842ae8..64f3e74fd4db31a864193e25888fa9ff94f0ba3c 100644 (file)
@@ -61,7 +61,9 @@ struct {
                /* IOAPIC */ {
                        .address = 0xfec00000,
                        .id = 0xff01,
-                       .pin_bitmap = 0x000200, /* ACPI IRQ */
+                       .pin_bitmap = {
+                               0x000200 /* ACPI IRQ */
+                       },
                },
        },
 
index b2b2a0f0dfc03e284846461512c0b73131b2c1e8..c6960c4709c1d1d03ebace33ca22d674d22b6151 100644 (file)
@@ -125,7 +125,10 @@ struct {
        .irqchips = {
                /* GIC */ {
                        .address = 0x50041000,
-                       .pin_bitmap = 0xffffffffffffffff,
+                       .pin_base = 32,
+                       .pin_bitmap = {
+                               0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
+                       },
                },
        },
 };
index a69672e428d60c13c0c28a699aac47f25af0785b..84e853c0460a6ddb2e7e32f85a111b616a320b31 100644 (file)
@@ -174,7 +174,9 @@ struct {
                /* IOAPIC */ {
                        .address = 0xfec00000,
                        .id = 0xff00,
-                       .pin_bitmap = 0xffffff,
+                       .pin_bitmap = {
+                                   0xffffff
+                       },
                },
        },
 
index 85a9fcbc417f246b96cf64aa2676fd57bf68f491..ebd33418b673aebea57ad390c04af0641c5ae6d3 100644 (file)
@@ -57,7 +57,10 @@ struct {
        .irqchips = {
                /* GIC */ {
                        .address = 0x2f000000,
-                       .pin_bitmap = 0x0000000000000100,
+                       .pin_base = 32,
+                       .pin_bitmap = {
+                               0x00000100,
+                       },
                },
        }
 };
index 6a9b0210355b2fbe5db1dfda89a0cf4186ebccbd..3caf3093ab13639a33d5e86239bd0338e64c376d 100644 (file)
@@ -106,7 +106,10 @@ struct {
        .irqchips = {
                /* GIC */ {
                        .address = 0x2f000000,
-                       .pin_bitmap = 0xffffffffffffffff,
+                       .pin_base = 32,
+                       .pin_bitmap = {
+                               0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
+                       },
                },
        },
 
index 0b1193ccc7be57eeff0959e61b683707367939f1..222ecaddd608df5133466532adf2b40681e8f7f0 100644 (file)
@@ -164,7 +164,7 @@ int irqchip_cell_init(struct cell *cell)
 {
        const struct jailhouse_irqchip *pins = irqchip_find_config(cell->config);
 
-       cell->arch.spis = (pins ? pins->pin_bitmap : 0);
+       cell->arch.spis = (pins ? *(u64 *)pins->pin_bitmap : 0);
 
        return irqchip.cell_init(cell);
 }
@@ -180,7 +180,8 @@ void irqchip_cell_exit(struct cell *cell)
                return;
 
        if (root_pins)
-               root_cell.arch.spis |= cell->arch.spis & root_pins->pin_bitmap;
+               root_cell.arch.spis |=
+                       cell->arch.spis & *(u64 *)root_pins->pin_bitmap;
 
        irqchip.cell_exit(cell);
 }
index 82521fba94e87e3237d7fd4f5a21373c0a206b13..395b9676f99dec008b2729a036621e115282ba2d 100644 (file)
@@ -358,7 +358,7 @@ int ioapic_cell_init(struct cell *cell)
                ioapic->info = irqchip;
                ioapic->cell = cell;
                ioapic->phys_ioapic = phys_ioapic;
-               ioapic->pin_bitmap = (u32)irqchip->pin_bitmap;
+               ioapic->pin_bitmap = irqchip->pin_bitmap[0];
                cell->arch.num_ioapics++;
 
                mmio_region_register(cell, irqchip->address, PAGE_SIZE,
@@ -390,7 +390,7 @@ void ioapic_cell_exit(struct cell *cell)
                if (root_ioapic)
                        root_ioapic->pin_bitmap |=
                                ioapic->pin_bitmap &
-                               root_ioapic->info->pin_bitmap;
+                               root_ioapic->info->pin_bitmap[0];
        }
 
        page_free(&mem_pool, cell->arch.ioapics, 1);
index 300f3dadc79fb2441415adfab6016e3bb54f0961..8e8495dc2a4669541788b3fb49553d4ae4e48891 100644 (file)
@@ -101,8 +101,9 @@ struct jailhouse_cache {
 
 struct jailhouse_irqchip {
        __u64 address;
-       __u64 id;
-       __u64 pin_bitmap;
+       __u32 id;
+       __u32 pin_base;
+       __u32 pin_bitmap[4];
 } __attribute__((packed));
 
 #define JAILHOUSE_PCI_TYPE_DEVICE      0x01
index 451869ae5f707f1c005756c626f3034244fc7770..a864fb6fb681ec749583edd7afb95ac98ccbdd44 100644 (file)
@@ -125,7 +125,9 @@ struct {
                {
                        .address = ${hex(i.address)},
                        .id = ${hex(i.irqchip_id())},
-                       .pin_bitmap = 0xffffff,
+                       .pin_bitmap = {
+                               0xffffff
+                       },
                },
                % endfor
        },