config, core: Improve irqchip configuration

config, core: Improve irqchip configuration

This aims at supporting irqchips with more than 64 pins. The idea is to
use multiple entries in this case, each describing a distinct set of the
pins. Therefore, a pin_base field is introduced to jailhouse_irqchip.
Moreover, we expand the number of pins for each entry to 128.

We do not exploit the extended pin number on ARM yet, but stick with
64 pins for now. Succeeding change sets will tackle it.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>