2 * Jailhouse, a Linux-based partitioning hypervisor
4 * Copyright (c) Siemens AG, 2014
7 * Ivan Kolchin <ivan.kolchin@siemens.com>
8 * Jan Kiszka <jan.kiszka@siemens.com>
10 * This work is licensed under the terms of the GNU GPL, version 2. See
11 * the COPYING file in the top-level directory.
14 #include <jailhouse/control.h>
15 #include <jailhouse/mmio.h>
16 #include <jailhouse/pci.h>
17 #include <jailhouse/printk.h>
18 #include <jailhouse/utils.h>
20 #define MSIX_VECTOR_CTRL_DWORD 3
22 #define for_each_configured_pci_device(dev, cell) \
23 for ((dev) = (cell)->pci_devices; \
24 (dev) - (cell)->pci_devices < (cell)->config->num_pci_devices; \
27 #define for_each_pci_cap(cap, dev, counter) \
28 for ((cap) = jailhouse_cell_pci_caps((dev)->cell->config) + \
29 (dev)->info->caps_start, (counter) = 0; \
30 (counter) < (dev)->info->num_caps; \
33 /* entry for PCI config space whitelist (granting access) */
34 struct pci_cfg_access {
35 u32 reg_num; /* Register number (4-byte aligned) */
36 u32 mask; /* Bit set: access allowed */
39 /* --- Whilelists for writing to PCI config space registers --- */
40 /* Type 1: Endpoints */
41 static const struct pci_cfg_access endpoint_write_access[] = {
42 { 0x04, 0xffffffff }, /* Command, Status */
43 { 0x0c, 0xff00ffff }, /* BIST, Latency Timer, Cacheline */
44 { 0x3c, 0x000000ff }, /* Int Line */
47 static const struct pci_cfg_access bridge_write_access[] = {
48 { 0x04, 0xffffffff }, /* Command, Status */
49 { 0x0c, 0xff00ffff }, /* BIST, Latency Timer, Cacheline */
50 { 0x3c, 0xffff00ff }, /* Int Line, Bridge Control */
53 static void *pci_space;
54 static u64 mmcfg_start, mmcfg_end;
57 static void *pci_get_device_mmcfg_base(u16 bdf)
59 return pci_space + ((unsigned long)bdf << 12);
63 * Read from PCI config space.
64 * @param bdf 16-bit bus/device/function ID of target.
65 * @param address Config space access address.
66 * @param size Access size (1, 2 or 4 bytes).
70 * @see pci_write_config
72 u32 pci_read_config(u16 bdf, u16 address, unsigned int size)
74 void *mmcfg_addr = pci_get_device_mmcfg_base(bdf) + address;
76 if (!pci_space || PCI_BUS(bdf) > end_bus)
77 return arch_pci_read_config(bdf, address, size);
80 return mmio_read8(mmcfg_addr);
82 return mmio_read16(mmcfg_addr);
84 return mmio_read32(mmcfg_addr);
88 * Write to PCI config space.
89 * @param bdf 16-bit bus/device/function ID of target.
90 * @param address Config space access address.
91 * @param value Value to be written.
92 * @param size Access size (1, 2 or 4 bytes).
94 * @see pci_read_config
96 void pci_write_config(u16 bdf, u16 address, u32 value, unsigned int size)
98 void *mmcfg_addr = pci_get_device_mmcfg_base(bdf) + address;
100 if (!pci_space || PCI_BUS(bdf) > end_bus)
101 return arch_pci_write_config(bdf, address, value, size);
104 mmio_write8(mmcfg_addr, value);
106 mmio_write16(mmcfg_addr, value);
108 mmio_write32(mmcfg_addr, value);
112 * Look up device owned by a cell.
113 * @param[in] cell Owning cell.
114 * @param bdf 16-bit bus/device/function ID.
116 * @return Pointer to owned PCI device or NULL.
118 struct pci_device *pci_get_assigned_device(const struct cell *cell, u16 bdf)
120 const struct jailhouse_pci_device *dev_info =
121 jailhouse_cell_pci_devices(cell->config);
124 /* We iterate over the static device information to increase cache
126 for (n = 0; n < cell->config->num_pci_devices; n++)
127 if (dev_info[n].bdf == bdf)
128 return cell->pci_devices[n].cell ?
129 &cell->pci_devices[n] : NULL;
135 * Look up capability at given config space address.
136 * @param device The device to be accessed.
137 * @param address Config space access address.
139 * @return Corresponding capability structure or NULL if none found.
143 static const struct jailhouse_pci_capability *
144 pci_find_capability(struct pci_device *device, u16 address)
146 const struct jailhouse_pci_capability *cap =
147 jailhouse_cell_pci_caps(device->cell->config) +
148 device->info->caps_start;
151 for (n = 0; n < device->info->num_caps; n++, cap++)
152 if (cap->start <= address && cap->start + cap->len > address)
159 * Moderate config space read access.
160 * @param device The device to be accessed. If NULL, access will be
161 * emulated, returning a value of -1.
162 * @param address Config space address.
163 * @param size Access size (1, 2 or 4 bytes).
164 * @param value Pointer to buffer to receive the emulated value if
165 * PCI_ACCESS_DONE is returned.
167 * @return PCI_ACCESS_PERFORM or PCI_ACCESS_DONE.
169 * @see pci_cfg_write_moderate
171 enum pci_access pci_cfg_read_moderate(struct pci_device *device, u16 address,
172 unsigned int size, u32 *value)
174 const struct jailhouse_pci_capability *cap;
175 unsigned int cap_offs;
179 return PCI_ACCESS_DONE;
182 if (address < PCI_CONFIG_HEADER_SIZE)
183 return PCI_ACCESS_PERFORM;
185 cap = pci_find_capability(device, address);
187 return PCI_ACCESS_PERFORM;
189 cap_offs = address - cap->start;
190 if (cap->id == PCI_CAP_MSI && cap_offs >= 4 &&
191 (cap_offs < 10 || (device->info->msi_64bits && cap_offs < 14))) {
192 *value = device->msi_registers.raw[cap_offs / 4] >>
193 ((cap_offs % 4) * 8);
194 return PCI_ACCESS_DONE;
197 return PCI_ACCESS_PERFORM;
200 static int pci_update_msix(struct pci_device *device,
201 const struct jailhouse_pci_capability *cap)
206 for (n = 0; n < device->info->num_msix_vectors; n++) {
207 result = arch_pci_update_msix_vector(device, n);
215 * Moderate config space write access.
216 * @param device The device to be accessed. If NULL, access will be
218 * @param address Config space address.
219 * @param size Access size (1, 2 or 4 bytes).
220 * @param value Value to be written.
222 * @return PCI_ACCESS_REJECT, PCI_ACCESS_PERFORM or PCI_ACCESS_DONE.
224 * @see pci_cfg_read_moderate
226 enum pci_access pci_cfg_write_moderate(struct pci_device *device, u16 address,
227 unsigned int size, u32 value)
229 const struct jailhouse_pci_capability *cap;
230 /* initialize list to work around wrong compiler warning */
231 const struct pci_cfg_access *list = NULL;
232 unsigned int bias_shift = (address % 4) * 8;
233 u32 mask = BYTE_MASK(size) << bias_shift;
234 unsigned int n, cap_offs, len = 0;
237 return PCI_ACCESS_REJECT;
239 if (address < PCI_CONFIG_HEADER_SIZE) {
240 if (device->info->type == JAILHOUSE_PCI_TYPE_DEVICE) {
241 list = endpoint_write_access;
242 len = ARRAY_SIZE(endpoint_write_access);
243 } else if (device->info->type == JAILHOUSE_PCI_TYPE_BRIDGE) {
244 list = bridge_write_access;
245 len = ARRAY_SIZE(bridge_write_access);
248 for (n = 0; n < len; n++) {
249 if (list[n].reg_num == (address & 0xffc) &&
250 (list[n].mask & mask) == mask)
251 return PCI_ACCESS_PERFORM;
254 // HACK to allow PCI bus rescanning in root-cell
255 if (device->info->type == JAILHOUSE_PCI_TYPE_BRIDGE &&
256 device->cell == &root_cell)
257 return PCI_ACCESS_DONE;
259 return PCI_ACCESS_REJECT;
262 cap = pci_find_capability(device, address);
263 if (!cap || !(cap->flags & JAILHOUSE_PCICAPS_WRITE))
264 return PCI_ACCESS_REJECT;
266 value <<= bias_shift;
268 cap_offs = address - cap->start;
269 if (cap->id == PCI_CAP_MSI &&
270 (cap_offs < 10 || (device->info->msi_64bits && cap_offs < 14))) {
271 device->msi_registers.raw[cap_offs / 4] &= ~mask;
272 device->msi_registers.raw[cap_offs / 4] |= value;
274 if (arch_pci_update_msi(device, cap) < 0)
275 return PCI_ACCESS_REJECT;
278 * Address and data words are emulated, the control word is
282 return PCI_ACCESS_DONE;
283 } else if (cap->id == PCI_CAP_MSIX && cap_offs < 4) {
284 device->msix_registers.raw &= ~mask;
285 device->msix_registers.raw |= value;
287 if (pci_update_msix(device, cap) < 0)
288 return PCI_ACCESS_REJECT;
291 return PCI_ACCESS_PERFORM;
295 * Initialization of PCI subsystem.
297 * @return 0 on success, negative error code otherwise.
301 unsigned int mmcfg_size;
304 err = pci_cell_init(&root_cell);
308 mmcfg_start = system_config->platform_info.x86.mmconfig_base;
309 if (mmcfg_start == 0)
312 end_bus = system_config->platform_info.x86.mmconfig_end_bus;
313 mmcfg_size = (end_bus + 1) * 256 * 4096;
314 mmcfg_end = mmcfg_start + mmcfg_size - 4;
316 pci_space = page_alloc(&remap_pool, mmcfg_size / PAGE_SIZE);
320 return paging_create(&hv_paging_structs, mmcfg_start, mmcfg_size,
321 (unsigned long)pci_space,
322 PAGE_DEFAULT_FLAGS | PAGE_FLAG_UNCACHED,
323 PAGING_NON_COHERENT);
326 static int pci_msix_access_handler(const struct cell *cell, bool is_write,
327 u64 addr, u32 *value)
329 unsigned int dword = (addr % sizeof(union pci_msix_vector)) >> 2;
330 struct pci_device *device = cell->msix_device_list;
335 if (addr >= device->info->msix_address &&
336 addr < device->info->msix_address +
337 device->info->msix_region_size)
339 device = device->next_msix_device;
344 /* access must be DWORD-aligned */
348 offs = addr - device->info->msix_address;
349 index = offs / sizeof(union pci_msix_vector);
353 * The PBA may share a page with the MSI-X table. Writing to
354 * PBA entries is undefined. We declare it as invalid.
356 if (index >= device->info->num_msix_vectors)
358 if (dword == MSIX_VECTOR_CTRL_DWORD) {
359 mmio_write32(&device->msix_table[index].field.ctrl,
362 device->msix_vectors[index].raw[dword] = *value;
363 if (arch_pci_update_msix_vector(device, index) < 0)
367 if (index >= device->info->num_msix_vectors ||
368 dword == MSIX_VECTOR_CTRL_DWORD)
370 mmio_read32(((void *)device->msix_table) + offs);
372 *value = device->msix_vectors[index].raw[dword];
377 panic_printk("FATAL: Invalid PCI MSIX BAR write, device "
378 "%02x:%02x.%x\n", PCI_BDF_PARAMS(device->info->bdf));
383 * Handler for MMIO-accesses to PCI config space.
384 * @param cell Request issuing cell.
385 * @param is_write True if write access.
386 * @param addr Address accessed.
387 * @param value Pointer to value for reading/writing.
389 * @return 1 if handled successfully, 0 if unhandled, -1 on access error.
391 int pci_mmio_access_handler(const struct cell *cell, bool is_write,
392 u64 addr, u32 *value)
394 u32 mmcfg_offset, reg_addr;
395 struct pci_device *device;
396 enum pci_access access;
398 if (!pci_space || addr < mmcfg_start || addr > mmcfg_end)
399 return pci_msix_access_handler(cell, is_write, addr, value);
401 mmcfg_offset = addr - mmcfg_start;
402 reg_addr = mmcfg_offset & 0xfff;
403 /* access must be DWORD-aligned */
407 device = pci_get_assigned_device(cell, mmcfg_offset >> 12);
410 access = pci_cfg_write_moderate(device, reg_addr, 4, *value);
411 if (access == PCI_ACCESS_REJECT)
413 if (access == PCI_ACCESS_PERFORM)
414 mmio_write32(pci_space + mmcfg_offset, *value);
416 access = pci_cfg_read_moderate(device, reg_addr, 4, value);
417 if (access == PCI_ACCESS_PERFORM)
418 *value = mmio_read32(pci_space + mmcfg_offset);
424 panic_printk("FATAL: Invalid PCI MMCONFIG write, device %02x:%02x.%x, "
425 "reg: %\n", PCI_BDF_PARAMS(mmcfg_offset >> 12), reg_addr);
431 * Retrieve number of enabled MSI vector of a device.
432 * @param device The device to be examined.
434 * @return number of vectors.
436 unsigned int pci_enabled_msi_vectors(struct pci_device *device)
438 return device->msi_registers.msg32.enable ?
439 1 << device->msi_registers.msg32.mme : 0;
442 static void pci_save_msi(struct pci_device *device,
443 const struct jailhouse_pci_capability *cap)
445 u16 bdf = device->info->bdf;
448 for (n = 0; n < (device->info->msi_64bits ? 4 : 3); n++)
449 device->msi_registers.raw[n] =
450 pci_read_config(bdf, cap->start + n * 4, 4);
453 static void pci_restore_msi(struct pci_device *device,
454 const struct jailhouse_pci_capability *cap)
458 for (n = 1; n < (device->info->msi_64bits ? 4 : 3); n++)
459 pci_write_config(device->info->bdf, cap->start + n * 4,
460 device->msi_registers.raw[n], 4);
463 static void pci_suppress_msix(struct pci_device *device,
464 const struct jailhouse_pci_capability *cap,
467 union pci_msix_registers regs = device->msix_registers;
470 regs.field.fmask = 1;
471 pci_write_config(device->info->bdf, cap->start, regs.raw, 4);
474 static void pci_save_msix(struct pci_device *device,
475 const struct jailhouse_pci_capability *cap)
479 device->msix_registers.raw =
480 pci_read_config(device->info->bdf, cap->start, 4);
482 for (n = 0; n < device->info->num_msix_vectors; n++)
483 for (r = 0; r < 3; r++)
484 device->msix_vectors[n].raw[r] =
485 mmio_read32(&device->msix_table[n].raw[r]);
488 static void pci_restore_msix(struct pci_device *device,
489 const struct jailhouse_pci_capability *cap)
493 for (n = 0; n < device->info->num_msix_vectors; n++)
494 for (r = 0; r < 3; r++)
495 mmio_write32(&device->msix_table[n].raw[r],
496 device->msix_vectors[n].raw[r]);
497 pci_suppress_msix(device, cap, false);
501 * Prepare the handover of PCI devices to Jailhouse or back to Linux.
503 void pci_prepare_handover(void)
505 const struct jailhouse_pci_capability *cap;
506 struct pci_device *device;
509 if (!root_cell.pci_devices)
512 for_each_configured_pci_device(device, &root_cell) {
514 for_each_pci_cap(cap, device, n)
515 if (cap->id == PCI_CAP_MSI)
516 arch_pci_suppress_msi(device, cap);
517 else if (cap->id == PCI_CAP_MSIX)
518 pci_suppress_msix(device, cap, true);
522 static void pci_add_virtual_device(struct cell *cell, struct pci_device *device)
525 device->next_virtual_device = cell->virtual_device_list;
526 cell->virtual_device_list = device;
529 static int pci_add_device(struct cell *cell, struct pci_device *device)
531 unsigned int size = device->info->msix_region_size;
534 printk("Adding PCI device %02x:%02x.%x to cell \"%s\"\n",
535 PCI_BDF_PARAMS(device->info->bdf), cell->config->name);
537 err = arch_pci_add_device(cell, device);
539 if (!err && device->info->msix_address) {
540 device->msix_table = page_alloc(&remap_pool, size / PAGE_SIZE);
541 if (!device->msix_table) {
543 goto error_remove_dev;
546 err = paging_create(&hv_paging_structs,
547 device->info->msix_address, size,
548 (unsigned long)device->msix_table,
549 PAGE_DEFAULT_FLAGS | PAGE_FLAG_UNCACHED,
550 PAGING_NON_COHERENT);
552 goto error_page_free;
554 device->next_msix_device = cell->msix_device_list;
555 cell->msix_device_list = device;
560 page_free(&remap_pool, device->msix_table, size / PAGE_SIZE);
562 arch_pci_remove_device(device);
566 static void pci_remove_virtual_device(struct pci_device *device)
568 struct pci_device *prev = device->cell->virtual_device_list;
570 if (prev == device) {
571 device->cell->virtual_device_list = device->next_virtual_device;
573 while (prev->next_virtual_device != device)
574 prev = prev->next_virtual_device;
575 prev->next_virtual_device = device->next_virtual_device;
579 static void pci_remove_device(struct pci_device *device)
581 unsigned int size = device->info->msix_region_size;
582 struct pci_device *prev_msix_device;
584 printk("Removing PCI device %02x:%02x.%x from cell \"%s\"\n",
585 PCI_BDF_PARAMS(device->info->bdf), device->cell->config->name);
586 arch_pci_remove_device(device);
587 pci_write_config(device->info->bdf, PCI_CFG_COMMAND,
588 PCI_CMD_INTX_OFF, 2);
590 if (!device->msix_table)
593 /* cannot fail, destruction of same size as construction */
594 paging_destroy(&hv_paging_structs, (unsigned long)device->msix_table,
595 size, PAGING_NON_COHERENT);
596 page_free(&remap_pool, device->msix_table, size / PAGE_SIZE);
598 prev_msix_device = device->cell->msix_device_list;
599 if (prev_msix_device == device) {
600 device->cell->msix_device_list = device->next_msix_device;
602 while (prev_msix_device->next_msix_device != device)
603 prev_msix_device = prev_msix_device->next_msix_device;
604 prev_msix_device->next_msix_device = device->next_msix_device;
609 * Perform PCI-specific initialization for a new cell.
610 * @param cell Cell to be initialized.
612 * @return 0 on success, negative error code otherwise.
616 int pci_cell_init(struct cell *cell)
618 unsigned int devlist_pages = PAGES(cell->config->num_pci_devices *
619 sizeof(struct pci_device));
620 const struct jailhouse_pci_device *dev_infos =
621 jailhouse_cell_pci_devices(cell->config);
622 const struct jailhouse_pci_capability *cap;
623 struct pci_device *device, *root_device;
624 unsigned int ndev, ncap;
627 cell->pci_devices = page_alloc(&mem_pool, devlist_pages);
628 if (!cell->pci_devices)
632 * We order device states in the same way as the static information
633 * so that we can use the index of the latter to find the former. For
634 * the other way around and for obtaining the owner cell, we use more
635 * handy pointers. The cell pointer also encodes active ownership.
637 for (ndev = 0; ndev < cell->config->num_pci_devices; ndev++) {
638 if (dev_infos[ndev].num_msix_vectors > PCI_MAX_MSIX_VECTORS) {
643 device = &cell->pci_devices[ndev];
644 device->info = &dev_infos[ndev];
646 root_device = pci_get_assigned_device(&root_cell,
647 dev_infos[ndev].bdf);
649 pci_remove_device(root_device);
650 root_device->cell = NULL;
653 err = pci_add_device(cell, device);
659 for_each_pci_cap(cap, device, ncap)
660 if (cap->id == PCI_CAP_MSI)
661 pci_save_msi(device, cap);
662 else if (cap->id == PCI_CAP_MSIX)
663 pci_save_msix(device, cap);
666 if (cell == &root_cell)
667 pci_prepare_handover();
675 static void pci_return_device_to_root_cell(struct pci_device *device)
677 struct pci_device *root_device;
679 for_each_configured_pci_device(root_device, &root_cell)
680 if (root_device->info->domain == device->info->domain &&
681 root_device->info->bdf == device->info->bdf) {
682 if (pci_add_device(&root_cell, root_device) < 0)
683 printk("WARNING: Failed to re-assign PCI "
684 "device to root cell\n");
686 root_device->cell = &root_cell;
692 * Perform PCI-specific cleanup for a cell under destruction.
693 * @param cell Cell to be destructed.
697 void pci_cell_exit(struct cell *cell)
699 unsigned int devlist_pages = PAGES(cell->config->num_pci_devices *
700 sizeof(struct pci_device));
701 struct pci_device *device;
704 * Do not destroy the root cell. We will shut down the complete
705 * hypervisor instead.
707 if (cell == &root_cell)
710 for_each_configured_pci_device(device, cell)
712 pci_remove_device(device);
713 pci_return_device_to_root_cell(device);
716 page_free(&mem_pool, cell->pci_devices, devlist_pages);
720 * Apply PCI-specific configuration changes.
721 * @param cell_added_removed Cell that was added or removed to/from the
724 * @see arch_config_commit
726 void pci_config_commit(struct cell *cell_added_removed)
728 const struct jailhouse_pci_capability *cap;
729 struct pci_device *device;
733 if (!cell_added_removed)
736 for_each_configured_pci_device(device, &root_cell)
738 for_each_pci_cap(cap, device, n) {
739 if (cap->id == PCI_CAP_MSI) {
740 err = arch_pci_update_msi(device, cap);
741 } else if (cap->id == PCI_CAP_MSIX) {
742 err = pci_update_msix(device, cap);
743 pci_suppress_msix(device, cap, false);
751 panic_printk("FATAL: Unsupported MSI/MSI-X state, device %02x:%02x.%x,"
752 " cap %d\n", PCI_BDF_PARAMS(device->info->bdf), cap->id);
757 * Shut down the PCI layer during hypervisor deactivation.
759 void pci_shutdown(void)
761 const struct jailhouse_pci_capability *cap;
762 struct pci_device *device;
765 if (!root_cell.pci_devices)
768 for_each_configured_pci_device(device, &root_cell)
770 for_each_pci_cap(cap, device, n)
771 if (cap->id == PCI_CAP_MSI)
772 pci_restore_msi(device, cap);
773 else if (cap->id == PCI_CAP_MSIX)
774 pci_restore_msix(device, cap);