]> rtime.felk.cvut.cz Git - jailhouse.git/blob - tools/root-cell-config.c.tmpl
tools: Add configuration generator
[jailhouse.git] / tools / root-cell-config.c.tmpl
1 /*
2  * Jailhouse, a Linux-based partitioning hypervisor
3  *
4  * Copyright (c) Siemens AG, 2014
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2.  See
7  * the COPYING file in the top-level directory.
8  *
9  * Configuration for ${product[0]} ${product[1]}
10  * created with '${argstr}'
11  *
12  * NOTE: This config expects the following to be appended to your kernel cmdline
13  *       "memmap=${hex(ourmem[1])}$${hex(ourmem[0])}"
14  */
15
16 #include <linux/types.h>
17 #include <jailhouse/cell-config.h>
18
19 #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
20
21 struct {
22         struct jailhouse_system header;
23         __u64 cpus[1];
24         struct jailhouse_memory mem_regions[${len(regions)}];
25         struct jailhouse_irqchip irqchips[1];
26         __u8 pio_bitmap[0x2000];
27         struct jailhouse_pci_device pci_devices[${len(pcidevices)}];
28 } __attribute__((packed)) config = {
29         .header = {
30                 .hypervisor_memory = {
31                         .phys_start = ${hex(hvmem[0])},
32                         .size = ${hex(hvmem[1])},
33                 },
34                 .config_memory = {
35                         .phys_start = ${hex(confmem[0])},
36                         .size = ${hex(confmem[1])},
37                 },
38                 .root_cell = {
39                         .name = "${product[1]}",
40                         .cpu_set_size = sizeof(config.cpus),
41                         .num_memory_regions = ARRAY_SIZE(config.mem_regions),
42                         .num_irqchips = ARRAY_SIZE(config.irqchips),
43                         .pio_bitmap_size = ARRAY_SIZE(config.pio_bitmap),
44                         .num_pci_devices = ARRAY_SIZE(config.pci_devices),
45                 },
46         },
47
48         .cpus = {
49                 0b${'1'*cpucount},
50         },
51
52         .mem_regions = {
53                 % for r in regions:
54                 /* ${str(r)} */
55                 % for c in r.comments:
56                 /* ${c} */
57                 % endfor
58                 {
59                         .phys_start = ${hex(r.start)},
60                         .virt_start = ${hex(r.start)},
61                         .size = ${hex(r.size())},
62                         .flags = ${r.flagstr('\t\t')},
63                 },
64                 % endfor
65         },
66
67         .irqchips = {
68                 /* IOAPIC */ {
69                         .address = 0xfec00000,
70                         .id = ${hex(ioapic_id)},
71                         .pin_bitmap = 0xffffff,
72                 },
73         },
74
75         .pio_bitmap = {
76                 [     0/8 ...   0x1f/8] = -1,
77                 [  0x20/8 ...   0x27/8] = 0xfc, /* HACK: PIC */
78                 [  0x28/8 ...   0x3f/8] = -1,
79                 [  0x40/8 ...   0x47/8] = 0xf0, /* PIT */
80                 [  0x48/8 ...   0x5f/8] = -1,
81                 [  0x60/8 ...   0x67/8] = 0, /* HACK: 8042, NMI status/control */
82                 [  0x68/8 ...   0x6f/8] = -1,
83                 [  0x70/8 ...   0x77/8] = 0xfc, /* RTC */
84                 [  0x78/8 ...  0x3af/8] = -1,
85                 [ 0x3b0/8 ...  0x3df/8] = 0x00, /* VGA */
86                 [ 0x3e0/8 ...  0x3ff/8] = -1,
87                 [ 0x400/8 ...  0x47f/8] = 0, /* HACK: ACPI */
88                 [ 0x480/8 ...  0xcff/8] = -1,
89                 [ 0xd00/8 ... 0xffff/8] = 0, /* HACK: PCI bus */
90         },
91
92         .pci_devices = {
93                 % for d in pcidevices:
94                 /* ${str(d)} */
95                 {
96                         .type = ${d.type},
97                         .domain = ${hex(d.domain)},
98                         .bus = ${hex(d.bus)},
99                         .devfn = ${hex(d.devfn())},
100                 },
101                 % endfor
102         },
103 };