2 * Jailhouse, a Linux-based partitioning hypervisor
4 * Copyright (c) ARM Limited, 2014
7 * Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
13 #ifndef _JAILHOUSE_ASM_IRQCHIP_H
14 #define _JAILHOUSE_ASM_IRQCHIP_H
17 * Since there is no finer-grained allocation than page-alloc for the moment,
18 * and it is very complicated to predict the total size needed at
19 * initialisation, each cpu is allocated one page of pending irqs.
20 * This allows for 256 pending IRQs, which should be sufficient.
22 #define MAX_PENDING_IRQS (PAGE_SIZE / sizeof(struct pending_irq))
24 #include <asm/percpu.h>
30 * Routing mode values:
31 * 0: use aff3.aff2.aff1.targets
32 * 1: all processors in the cell except this CPU
36 /* GICv2 only uses 8bit in targets, and no affinity routing */
39 /* Only available on 64-bit, when CTLR.A3V is 1 */
47 int (*cpu_init)(struct per_cpu *cpu_data);
49 int (*send_sgi)(struct sgi *sgi);
50 void (*handle_irq)(struct per_cpu *cpu_data);
51 int (*inject_irq)(struct per_cpu *cpu_data, struct pending_irq *irq);
54 /* Virtual interrupts waiting to be injected */
61 /* Physical id, when hw is 1 */
64 /* GICv2 needs cpuid for SGIs */
66 /* EOI generates a maintenance irq */
68 } sgi __attribute__((packed));
71 struct pending_irq *next;
72 struct pending_irq *prev;
73 } __attribute__((packed));
75 int irqchip_init(void);
76 int irqchip_cpu_init(struct per_cpu *cpu_data);
78 int irqchip_send_sgi(struct sgi *sgi);
79 void irqchip_handle_irq(struct per_cpu *cpu_data);
81 int irqchip_inject_pending(struct per_cpu *cpu_data);
82 int irqchip_insert_pending(struct per_cpu *cpu_data, struct pending_irq *irq);
83 int irqchip_remove_pending(struct per_cpu *cpu_data, struct pending_irq *irq);
85 #endif /* __ASSEMBLY__ */
86 #endif /* _JAILHOUSE_ASM_IRQCHIP_H */