]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/tree - scripts/
microzed_apo: Correct JX1_LVDS_21_N pin assignment on FPGA_IO header.
[fpga/zynq/canbench-sw.git] / scripts /
drwxr-xr-x   ..
-rwxr-xr-x 521 caninit
-rwxr-xr-x 49 upbit