]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - system/ip/can_merge
projects / fpga / zynq / canbench-sw.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
microzed_apo: Correct JX1_LVDS_21_N pin assignment on FPGA_IO header.
[fpga/zynq/canbench-sw.git] / system / ip / can_merge /
2016-05-12 Martin Jerabeksja1000: IP fixes, corrected device-tree entry, it... tree | commitdiff
2016-03-30 Martin Jerabekadded system and petalinux configuration, scripts,... tree | commitdiff
CAN benchmark FPGA design and software for MicroZed board