system/ip/display_16bit_cmd_data_bus_1.0/component.xml

   1 <?xml version="1.0" encoding="UTF-8"?>
   2 <spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
   3   <spirit:vendor>user.org</spirit:vendor>
   4   <spirit:library>user</spirit:library>
   5   <spirit:name>display_16bit_cmd_data_bus</spirit:name>
   6   <spirit:version>1.0</spirit:version>
   7   <spirit:busInterfaces>
   8     <spirit:busInterface>
   9       <spirit:name>S00_AXI</spirit:name>
  10       <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
  11       <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
  12       <spirit:slave>
  13         <spirit:memoryMapRef spirit:memoryMapRef="S00_AXI"/>
  14       </spirit:slave>
  15       <spirit:portMaps>
  16         <spirit:portMap>
  17           <spirit:logicalPort>
  18             <spirit:name>AWADDR</spirit:name>
  19           </spirit:logicalPort>
  20           <spirit:physicalPort>
  21             <spirit:name>s00_axi_awaddr</spirit:name>
  22           </spirit:physicalPort>
  23         </spirit:portMap>
  24         <spirit:portMap>
  25           <spirit:logicalPort>
  26             <spirit:name>AWPROT</spirit:name>
  27           </spirit:logicalPort>
  28           <spirit:physicalPort>
  29             <spirit:name>s00_axi_awprot</spirit:name>
  30           </spirit:physicalPort>
  31         </spirit:portMap>
  32         <spirit:portMap>
  33           <spirit:logicalPort>
  34             <spirit:name>AWVALID</spirit:name>
  35           </spirit:logicalPort>
  36           <spirit:physicalPort>
  37             <spirit:name>s00_axi_awvalid</spirit:name>
  38           </spirit:physicalPort>
  39         </spirit:portMap>
  40         <spirit:portMap>
  41           <spirit:logicalPort>
  42             <spirit:name>AWREADY</spirit:name>
  43           </spirit:logicalPort>
  44           <spirit:physicalPort>
  45             <spirit:name>s00_axi_awready</spirit:name>
  46           </spirit:physicalPort>
  47         </spirit:portMap>
  48         <spirit:portMap>
  49           <spirit:logicalPort>
  50             <spirit:name>WDATA</spirit:name>
  51           </spirit:logicalPort>
  52           <spirit:physicalPort>
  53             <spirit:name>s00_axi_wdata</spirit:name>
  54           </spirit:physicalPort>
  55         </spirit:portMap>
  56         <spirit:portMap>
  57           <spirit:logicalPort>
  58             <spirit:name>WSTRB</spirit:name>
  59           </spirit:logicalPort>
  60           <spirit:physicalPort>
  61             <spirit:name>s00_axi_wstrb</spirit:name>
  62           </spirit:physicalPort>
  63         </spirit:portMap>
  64         <spirit:portMap>
  65           <spirit:logicalPort>
  66             <spirit:name>WVALID</spirit:name>
  67           </spirit:logicalPort>
  68           <spirit:physicalPort>
  69             <spirit:name>s00_axi_wvalid</spirit:name>
  70           </spirit:physicalPort>
  71         </spirit:portMap>
  72         <spirit:portMap>
  73           <spirit:logicalPort>
  74             <spirit:name>WREADY</spirit:name>
  75           </spirit:logicalPort>
  76           <spirit:physicalPort>
  77             <spirit:name>s00_axi_wready</spirit:name>
  78           </spirit:physicalPort>
  79         </spirit:portMap>
  80         <spirit:portMap>
  81           <spirit:logicalPort>
  82             <spirit:name>BRESP</spirit:name>
  83           </spirit:logicalPort>
  84           <spirit:physicalPort>
  85             <spirit:name>s00_axi_bresp</spirit:name>
  86           </spirit:physicalPort>
  87         </spirit:portMap>
  88         <spirit:portMap>
  89           <spirit:logicalPort>
  90             <spirit:name>BVALID</spirit:name>
  91           </spirit:logicalPort>
  92           <spirit:physicalPort>
  93             <spirit:name>s00_axi_bvalid</spirit:name>
  94           </spirit:physicalPort>
  95         </spirit:portMap>
  96         <spirit:portMap>
  97           <spirit:logicalPort>
  98             <spirit:name>BREADY</spirit:name>
  99           </spirit:logicalPort>
 100           <spirit:physicalPort>
 101             <spirit:name>s00_axi_bready</spirit:name>
 102           </spirit:physicalPort>
 103         </spirit:portMap>
 104         <spirit:portMap>
 105           <spirit:logicalPort>
 106             <spirit:name>ARADDR</spirit:name>
 107           </spirit:logicalPort>
 108           <spirit:physicalPort>
 109             <spirit:name>s00_axi_araddr</spirit:name>
 110           </spirit:physicalPort>
 111         </spirit:portMap>
 112         <spirit:portMap>
 113           <spirit:logicalPort>
 114             <spirit:name>ARPROT</spirit:name>
 115           </spirit:logicalPort>
 116           <spirit:physicalPort>
 117             <spirit:name>s00_axi_arprot</spirit:name>
 118           </spirit:physicalPort>
 119         </spirit:portMap>
 120         <spirit:portMap>
 121           <spirit:logicalPort>
 122             <spirit:name>ARVALID</spirit:name>
 123           </spirit:logicalPort>
 124           <spirit:physicalPort>
 125             <spirit:name>s00_axi_arvalid</spirit:name>
 126           </spirit:physicalPort>
 127         </spirit:portMap>
 128         <spirit:portMap>
 129           <spirit:logicalPort>
 130             <spirit:name>ARREADY</spirit:name>
 131           </spirit:logicalPort>
 132           <spirit:physicalPort>
 133             <spirit:name>s00_axi_arready</spirit:name>
 134           </spirit:physicalPort>
 135         </spirit:portMap>
 136         <spirit:portMap>
 137           <spirit:logicalPort>
 138             <spirit:name>RDATA</spirit:name>
 139           </spirit:logicalPort>
 140           <spirit:physicalPort>
 141             <spirit:name>s00_axi_rdata</spirit:name>
 142           </spirit:physicalPort>
 143         </spirit:portMap>
 144         <spirit:portMap>
 145           <spirit:logicalPort>
 146             <spirit:name>RRESP</spirit:name>
 147           </spirit:logicalPort>
 148           <spirit:physicalPort>
 149             <spirit:name>s00_axi_rresp</spirit:name>
 150           </spirit:physicalPort>
 151         </spirit:portMap>
 152         <spirit:portMap>
 153           <spirit:logicalPort>
 154             <spirit:name>RVALID</spirit:name>
 155           </spirit:logicalPort>
 156           <spirit:physicalPort>
 157             <spirit:name>s00_axi_rvalid</spirit:name>
 158           </spirit:physicalPort>
 159         </spirit:portMap>
 160         <spirit:portMap>
 161           <spirit:logicalPort>
 162             <spirit:name>RREADY</spirit:name>
 163           </spirit:logicalPort>
 164           <spirit:physicalPort>
 165             <spirit:name>s00_axi_rready</spirit:name>
 166           </spirit:physicalPort>
 167         </spirit:portMap>
 168       </spirit:portMaps>
 169       <spirit:parameters>
 170         <spirit:parameter>
 171           <spirit:name>WIZ_DATA_WIDTH</spirit:name>
 172           <spirit:value spirit:format="long" spirit:id="BUSIFPARAM_VALUE.S00_AXI.WIZ_DATA_WIDTH" spirit:choiceRef="choice_list_6fc15197">32</spirit:value>
 173         </spirit:parameter>
 174         <spirit:parameter>
 175           <spirit:name>WIZ_NUM_REG</spirit:name>
 176           <spirit:value spirit:format="long" spirit:id="BUSIFPARAM_VALUE.S00_AXI.WIZ_NUM_REG" spirit:minimum="4" spirit:maximum="512" spirit:rangeType="long">16</spirit:value>
 177         </spirit:parameter>
 178         <spirit:parameter>
 179           <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
 180           <spirit:value spirit:format="long" spirit:id="BUSIFPARAM_VALUE.S00_AXI.SUPPORTS_NARROW_BURST" spirit:choiceRef="choice_pairs_ce1226b1">0</spirit:value>
 181         </spirit:parameter>
 182       </spirit:parameters>
 183     </spirit:busInterface>
 184     <spirit:busInterface>
 185       <spirit:name>M00_AXI</spirit:name>
 186       <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
 187       <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
 188       <spirit:master>
 189         <spirit:addressSpaceRef spirit:addressSpaceRef="M00_AXI"/>
 190       </spirit:master>
 191       <spirit:portMaps>
 192         <spirit:portMap>
 193           <spirit:logicalPort>
 194             <spirit:name>AWADDR</spirit:name>
 195           </spirit:logicalPort>
 196           <spirit:physicalPort>
 197             <spirit:name>m00_axi_awaddr</spirit:name>
 198           </spirit:physicalPort>
 199         </spirit:portMap>
 200         <spirit:portMap>
 201           <spirit:logicalPort>
 202             <spirit:name>AWPROT</spirit:name>
 203           </spirit:logicalPort>
 204           <spirit:physicalPort>
 205             <spirit:name>m00_axi_awprot</spirit:name>
 206           </spirit:physicalPort>
 207         </spirit:portMap>
 208         <spirit:portMap>
 209           <spirit:logicalPort>
 210             <spirit:name>AWVALID</spirit:name>
 211           </spirit:logicalPort>
 212           <spirit:physicalPort>
 213             <spirit:name>m00_axi_awvalid</spirit:name>
 214           </spirit:physicalPort>
 215         </spirit:portMap>
 216         <spirit:portMap>
 217           <spirit:logicalPort>
 218             <spirit:name>AWREADY</spirit:name>
 219           </spirit:logicalPort>
 220           <spirit:physicalPort>
 221             <spirit:name>m00_axi_awready</spirit:name>
 222           </spirit:physicalPort>
 223         </spirit:portMap>
 224         <spirit:portMap>
 225           <spirit:logicalPort>
 226             <spirit:name>WDATA</spirit:name>
 227           </spirit:logicalPort>
 228           <spirit:physicalPort>
 229             <spirit:name>m00_axi_wdata</spirit:name>
 230           </spirit:physicalPort>
 231         </spirit:portMap>
 232         <spirit:portMap>
 233           <spirit:logicalPort>
 234             <spirit:name>WSTRB</spirit:name>
 235           </spirit:logicalPort>
 236           <spirit:physicalPort>
 237             <spirit:name>m00_axi_wstrb</spirit:name>
 238           </spirit:physicalPort>
 239         </spirit:portMap>
 240         <spirit:portMap>
 241           <spirit:logicalPort>
 242             <spirit:name>WVALID</spirit:name>
 243           </spirit:logicalPort>
 244           <spirit:physicalPort>
 245             <spirit:name>m00_axi_wvalid</spirit:name>
 246           </spirit:physicalPort>
 247         </spirit:portMap>
 248         <spirit:portMap>
 249           <spirit:logicalPort>
 250             <spirit:name>WREADY</spirit:name>
 251           </spirit:logicalPort>
 252           <spirit:physicalPort>
 253             <spirit:name>m00_axi_wready</spirit:name>
 254           </spirit:physicalPort>
 255         </spirit:portMap>
 256         <spirit:portMap>
 257           <spirit:logicalPort>
 258             <spirit:name>BRESP</spirit:name>
 259           </spirit:logicalPort>
 260           <spirit:physicalPort>
 261             <spirit:name>m00_axi_bresp</spirit:name>
 262           </spirit:physicalPort>
 263         </spirit:portMap>
 264         <spirit:portMap>
 265           <spirit:logicalPort>
 266             <spirit:name>BVALID</spirit:name>
 267           </spirit:logicalPort>
 268           <spirit:physicalPort>
 269             <spirit:name>m00_axi_bvalid</spirit:name>
 270           </spirit:physicalPort>
 271         </spirit:portMap>
 272         <spirit:portMap>
 273           <spirit:logicalPort>
 274             <spirit:name>BREADY</spirit:name>
 275           </spirit:logicalPort>
 276           <spirit:physicalPort>
 277             <spirit:name>m00_axi_bready</spirit:name>
 278           </spirit:physicalPort>
 279         </spirit:portMap>
 280         <spirit:portMap>
 281           <spirit:logicalPort>
 282             <spirit:name>ARADDR</spirit:name>
 283           </spirit:logicalPort>
 284           <spirit:physicalPort>
 285             <spirit:name>m00_axi_araddr</spirit:name>
 286           </spirit:physicalPort>
 287         </spirit:portMap>
 288         <spirit:portMap>
 289           <spirit:logicalPort>
 290             <spirit:name>ARPROT</spirit:name>
 291           </spirit:logicalPort>
 292           <spirit:physicalPort>
 293             <spirit:name>m00_axi_arprot</spirit:name>
 294           </spirit:physicalPort>
 295         </spirit:portMap>
 296         <spirit:portMap>
 297           <spirit:logicalPort>
 298             <spirit:name>ARVALID</spirit:name>
 299           </spirit:logicalPort>
 300           <spirit:physicalPort>
 301             <spirit:name>m00_axi_arvalid</spirit:name>
 302           </spirit:physicalPort>
 303         </spirit:portMap>
 304         <spirit:portMap>
 305           <spirit:logicalPort>
 306             <spirit:name>ARREADY</spirit:name>
 307           </spirit:logicalPort>
 308           <spirit:physicalPort>
 309             <spirit:name>m00_axi_arready</spirit:name>
 310           </spirit:physicalPort>
 311         </spirit:portMap>
 312         <spirit:portMap>
 313           <spirit:logicalPort>
 314             <spirit:name>RDATA</spirit:name>
 315           </spirit:logicalPort>
 316           <spirit:physicalPort>
 317             <spirit:name>m00_axi_rdata</spirit:name>
 318           </spirit:physicalPort>
 319         </spirit:portMap>
 320         <spirit:portMap>
 321           <spirit:logicalPort>
 322             <spirit:name>RRESP</spirit:name>
 323           </spirit:logicalPort>
 324           <spirit:physicalPort>
 325             <spirit:name>m00_axi_rresp</spirit:name>
 326           </spirit:physicalPort>
 327         </spirit:portMap>
 328         <spirit:portMap>
 329           <spirit:logicalPort>
 330             <spirit:name>RVALID</spirit:name>
 331           </spirit:logicalPort>
 332           <spirit:physicalPort>
 333             <spirit:name>m00_axi_rvalid</spirit:name>
 334           </spirit:physicalPort>
 335         </spirit:portMap>
 336         <spirit:portMap>
 337           <spirit:logicalPort>
 338             <spirit:name>RREADY</spirit:name>
 339           </spirit:logicalPort>
 340           <spirit:physicalPort>
 341             <spirit:name>m00_axi_rready</spirit:name>
 342           </spirit:physicalPort>
 343         </spirit:portMap>
 344       </spirit:portMaps>
 345       <spirit:parameters>
 346         <spirit:parameter>
 347           <spirit:name>WIZ_DATA_WIDTH</spirit:name>
 348           <spirit:value spirit:format="long" spirit:id="BUSIFPARAM_VALUE.M00_AXI.WIZ_DATA_WIDTH" spirit:choiceRef="choice_list_6fc15197">32</spirit:value>
 349         </spirit:parameter>
 350         <spirit:parameter>
 351           <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
 352           <spirit:value spirit:format="long" spirit:id="BUSIFPARAM_VALUE.M00_AXI.SUPPORTS_NARROW_BURST" spirit:choiceRef="choice_pairs_ce1226b1">0</spirit:value>
 353         </spirit:parameter>
 354       </spirit:parameters>
 355     </spirit:busInterface>
 356     <spirit:busInterface>
 357       <spirit:name>S00_AXI_RST</spirit:name>
 358       <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
 359       <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
 360       <spirit:slave/>
 361       <spirit:portMaps>
 362         <spirit:portMap>
 363           <spirit:logicalPort>
 364             <spirit:name>RST</spirit:name>
 365           </spirit:logicalPort>
 366           <spirit:physicalPort>
 367             <spirit:name>s00_axi_aresetn</spirit:name>
 368           </spirit:physicalPort>
 369         </spirit:portMap>
 370       </spirit:portMaps>
 371       <spirit:parameters>
 372         <spirit:parameter>
 373           <spirit:name>POLARITY</spirit:name>
 374           <spirit:value spirit:id="BUSIFPARAM_VALUE.S00_AXI_RST.POLARITY">ACTIVE_LOW</spirit:value>
 375         </spirit:parameter>
 376       </spirit:parameters>
 377     </spirit:busInterface>
 378     <spirit:busInterface>
 379       <spirit:name>S00_AXI_CLK</spirit:name>
 380       <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
 381       <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
 382       <spirit:slave/>
 383       <spirit:portMaps>
 384         <spirit:portMap>
 385           <spirit:logicalPort>
 386             <spirit:name>CLK</spirit:name>
 387           </spirit:logicalPort>
 388           <spirit:physicalPort>
 389             <spirit:name>s00_axi_aclk</spirit:name>
 390           </spirit:physicalPort>
 391         </spirit:portMap>
 392       </spirit:portMaps>
 393       <spirit:parameters>
 394         <spirit:parameter>
 395           <spirit:name>ASSOCIATED_BUSIF</spirit:name>
 396           <spirit:value spirit:id="BUSIFPARAM_VALUE.S00_AXI_CLK.ASSOCIATED_BUSIF">S00_AXI</spirit:value>
 397         </spirit:parameter>
 398         <spirit:parameter>
 399           <spirit:name>ASSOCIATED_RESET</spirit:name>
 400           <spirit:value spirit:id="BUSIFPARAM_VALUE.S00_AXI_CLK.ASSOCIATED_RESET">s00_axi_aresetn</spirit:value>
 401         </spirit:parameter>
 402       </spirit:parameters>
 403     </spirit:busInterface>
 404     <spirit:busInterface>
 405       <spirit:name>M00_AXI_RST</spirit:name>
 406       <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
 407       <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
 408       <spirit:slave/>
 409       <spirit:portMaps>
 410         <spirit:portMap>
 411           <spirit:logicalPort>
 412             <spirit:name>RST</spirit:name>
 413           </spirit:logicalPort>
 414           <spirit:physicalPort>
 415             <spirit:name>m00_axi_aresetn</spirit:name>
 416           </spirit:physicalPort>
 417         </spirit:portMap>
 418       </spirit:portMaps>
 419       <spirit:parameters>
 420         <spirit:parameter>
 421           <spirit:name>POLARITY</spirit:name>
 422           <spirit:value spirit:id="BUSIFPARAM_VALUE.M00_AXI_RST.POLARITY">ACTIVE_LOW</spirit:value>
 423         </spirit:parameter>
 424       </spirit:parameters>
 425     </spirit:busInterface>
 426     <spirit:busInterface>
 427       <spirit:name>M00_AXI_CLK</spirit:name>
 428       <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
 429       <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
 430       <spirit:slave/>
 431       <spirit:portMaps>
 432         <spirit:portMap>
 433           <spirit:logicalPort>
 434             <spirit:name>CLK</spirit:name>
 435           </spirit:logicalPort>
 436           <spirit:physicalPort>
 437             <spirit:name>m00_axi_aclk</spirit:name>
 438           </spirit:physicalPort>
 439         </spirit:portMap>
 440       </spirit:portMaps>
 441       <spirit:parameters>
 442         <spirit:parameter>
 443           <spirit:name>ASSOCIATED_BUSIF</spirit:name>
 444           <spirit:value spirit:id="BUSIFPARAM_VALUE.M00_AXI_CLK.ASSOCIATED_BUSIF">M00_AXI</spirit:value>
 445         </spirit:parameter>
 446         <spirit:parameter>
 447           <spirit:name>ASSOCIATED_RESET</spirit:name>
 448           <spirit:value spirit:id="BUSIFPARAM_VALUE.M00_AXI_CLK.ASSOCIATED_RESET">m00_axi_aresetn</spirit:value>
 449         </spirit:parameter>
 450       </spirit:parameters>
 451     </spirit:busInterface>
 452   </spirit:busInterfaces>
 453   <spirit:addressSpaces>
 454     <spirit:addressSpace>
 455       <spirit:name>M00_AXI</spirit:name>
 456       <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="pow(2,(spirit:decode(id(&apos;MODELPARAM_VALUE.C_M00_AXI_ADDR_WIDTH&apos;)) - 1) + 1)" spirit:minimum="0" spirit:maximum="4294967296" spirit:rangeType="long">4294967296</spirit:range>
 457       <spirit:width spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_M00_AXI_DATA_WIDTH&apos;)) - 1) + 1">32</spirit:width>
 458     </spirit:addressSpace>
 459   </spirit:addressSpaces>
 460   <spirit:memoryMaps>
 461     <spirit:memoryMap>
 462       <spirit:name>S00_AXI</spirit:name>
 463       <spirit:addressBlock>
 464         <spirit:name>S00_AXI_reg</spirit:name>
 465         <spirit:baseAddress spirit:format="long" spirit:resolve="user">0</spirit:baseAddress>
 466         <spirit:range spirit:format="long">4096</spirit:range>
 467         <spirit:width spirit:format="long">32</spirit:width>
 468         <spirit:usage>register</spirit:usage>
 469         <spirit:parameters>
 470           <spirit:parameter>
 471             <spirit:name>OFFSET_BASE_PARAM</spirit:name>
 472             <spirit:value spirit:id="ADDRBLOCKPARAM_VALUE.S00_AXI.S00_AXI_REG.OFFSET_BASE_PARAM">C_S00_AXI_BASEADDR</spirit:value>
 473           </spirit:parameter>
 474           <spirit:parameter>
 475             <spirit:name>OFFSET_HIGH_PARAM</spirit:name>
 476             <spirit:value spirit:id="ADDRBLOCKPARAM_VALUE.S00_AXI.S00_AXI_REG.OFFSET_HIGH_PARAM">C_S00_AXI_HIGHADDR</spirit:value>
 477           </spirit:parameter>
 478         </spirit:parameters>
 479       </spirit:addressBlock>
 480     </spirit:memoryMap>
 481   </spirit:memoryMaps>
 482   <spirit:model>
 483     <spirit:views>
 484       <spirit:view>
 485         <spirit:name>xilinx_vhdlsynthesis</spirit:name>
 486         <spirit:displayName>VHDL Synthesis</spirit:displayName>
 487         <spirit:envIdentifier>vhdlSource:vivado.xilinx.com:synthesis</spirit:envIdentifier>
 488         <spirit:language>vhdl</spirit:language>
 489         <spirit:modelName>display_16bit_cmd_data_bus_v1_0</spirit:modelName>
 490         <spirit:fileSetRef>
 491           <spirit:localName>xilinx_vhdlsynthesis_view_fileset</spirit:localName>
 492         </spirit:fileSetRef>
 493         <spirit:parameters>
 494           <spirit:parameter>
 495             <spirit:name>viewChecksum</spirit:name>
 496             <spirit:value>99bb521e</spirit:value>
 497           </spirit:parameter>
 498         </spirit:parameters>
 499       </spirit:view>
 500       <spirit:view>
 501         <spirit:name>xilinx_vhdlbehavioralsimulation</spirit:name>
 502         <spirit:displayName>VHDL Simulation</spirit:displayName>
 503         <spirit:envIdentifier>vhdlSource:vivado.xilinx.com:simulation</spirit:envIdentifier>
 504         <spirit:language>vhdl</spirit:language>
 505         <spirit:modelName>display_16bit_cmd_data_bus_v1_0</spirit:modelName>
 506         <spirit:fileSetRef>
 507           <spirit:localName>xilinx_vhdlbehavioralsimulation_view_fileset</spirit:localName>
 508         </spirit:fileSetRef>
 509         <spirit:parameters>
 510           <spirit:parameter>
 511             <spirit:name>viewChecksum</spirit:name>
 512             <spirit:value>99bb521e</spirit:value>
 513           </spirit:parameter>
 514         </spirit:parameters>
 515       </spirit:view>
 516       <spirit:view>
 517         <spirit:name>xilinx_softwaredriver</spirit:name>
 518         <spirit:displayName>Software Driver</spirit:displayName>
 519         <spirit:envIdentifier>:vivado.xilinx.com:sw.driver</spirit:envIdentifier>
 520         <spirit:fileSetRef>
 521           <spirit:localName>xilinx_softwaredriver_view_fileset</spirit:localName>
 522         </spirit:fileSetRef>
 523         <spirit:parameters>
 524           <spirit:parameter>
 525             <spirit:name>viewChecksum</spirit:name>
 526             <spirit:value>dda9c52d</spirit:value>
 527           </spirit:parameter>
 528         </spirit:parameters>
 529       </spirit:view>
 530       <spirit:view>
 531         <spirit:name>xilinx_xpgui</spirit:name>
 532         <spirit:displayName>UI Layout</spirit:displayName>
 533         <spirit:envIdentifier>:vivado.xilinx.com:xgui.ui</spirit:envIdentifier>
 534         <spirit:fileSetRef>
 535           <spirit:localName>xilinx_xpgui_view_fileset</spirit:localName>
 536         </spirit:fileSetRef>
 537         <spirit:parameters>
 538           <spirit:parameter>
 539             <spirit:name>viewChecksum</spirit:name>
 540             <spirit:value>b09a532b</spirit:value>
 541           </spirit:parameter>
 542         </spirit:parameters>
 543       </spirit:view>
 544       <spirit:view>
 545         <spirit:name>bd_tcl</spirit:name>
 546         <spirit:displayName>Block Diagram</spirit:displayName>
 547         <spirit:envIdentifier>:vivado.xilinx.com:block.diagram</spirit:envIdentifier>
 548         <spirit:fileSetRef>
 549           <spirit:localName>bd_tcl_view_fileset</spirit:localName>
 550         </spirit:fileSetRef>
 551         <spirit:parameters>
 552           <spirit:parameter>
 553             <spirit:name>viewChecksum</spirit:name>
 554             <spirit:value>eb6528c9</spirit:value>
 555           </spirit:parameter>
 556         </spirit:parameters>
 557       </spirit:view>
 558     </spirit:views>
 559     <spirit:ports>
 560       <spirit:port>
 561         <spirit:name>lcd_res_n</spirit:name>
 562         <spirit:wire>
 563           <spirit:direction>out</spirit:direction>
 564           <spirit:wireTypeDefs>
 565             <spirit:wireTypeDef>
 566               <spirit:typeName>std_logic</spirit:typeName>
 567               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 568               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 569             </spirit:wireTypeDef>
 570           </spirit:wireTypeDefs>
 571         </spirit:wire>
 572       </spirit:port>
 573       <spirit:port>
 574         <spirit:name>lcd_cs_n</spirit:name>
 575         <spirit:wire>
 576           <spirit:direction>out</spirit:direction>
 577           <spirit:wireTypeDefs>
 578             <spirit:wireTypeDef>
 579               <spirit:typeName>std_logic</spirit:typeName>
 580               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 581               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 582             </spirit:wireTypeDef>
 583           </spirit:wireTypeDefs>
 584         </spirit:wire>
 585       </spirit:port>
 586       <spirit:port>
 587         <spirit:name>lcd_wr_n</spirit:name>
 588         <spirit:wire>
 589           <spirit:direction>out</spirit:direction>
 590           <spirit:wireTypeDefs>
 591             <spirit:wireTypeDef>
 592               <spirit:typeName>std_logic</spirit:typeName>
 593               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 594               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 595             </spirit:wireTypeDef>
 596           </spirit:wireTypeDefs>
 597         </spirit:wire>
 598       </spirit:port>
 599       <spirit:port>
 600         <spirit:name>lcd_rd_n</spirit:name>
 601         <spirit:wire>
 602           <spirit:direction>out</spirit:direction>
 603           <spirit:wireTypeDefs>
 604             <spirit:wireTypeDef>
 605               <spirit:typeName>std_logic</spirit:typeName>
 606               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 607               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 608             </spirit:wireTypeDef>
 609           </spirit:wireTypeDefs>
 610         </spirit:wire>
 611       </spirit:port>
 612       <spirit:port>
 613         <spirit:name>lcd_dc</spirit:name>
 614         <spirit:wire>
 615           <spirit:direction>out</spirit:direction>
 616           <spirit:wireTypeDefs>
 617             <spirit:wireTypeDef>
 618               <spirit:typeName>std_logic</spirit:typeName>
 619               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 620               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 621             </spirit:wireTypeDef>
 622           </spirit:wireTypeDefs>
 623         </spirit:wire>
 624       </spirit:port>
 625       <spirit:port>
 626         <spirit:name>lcd_data</spirit:name>
 627         <spirit:wire>
 628           <spirit:direction>inout</spirit:direction>
 629           <spirit:vector>
 630             <spirit:left spirit:format="long">15</spirit:left>
 631             <spirit:right spirit:format="long">0</spirit:right>
 632           </spirit:vector>
 633           <spirit:wireTypeDefs>
 634             <spirit:wireTypeDef>
 635               <spirit:typeName>std_logic_vector</spirit:typeName>
 636               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 637               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 638             </spirit:wireTypeDef>
 639           </spirit:wireTypeDefs>
 640         </spirit:wire>
 641       </spirit:port>
 642       <spirit:port>
 643         <spirit:name>irq_rq_out</spirit:name>
 644         <spirit:wire>
 645           <spirit:direction>out</spirit:direction>
 646           <spirit:wireTypeDefs>
 647             <spirit:wireTypeDef>
 648               <spirit:typeName>std_logic</spirit:typeName>
 649               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 650               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 651             </spirit:wireTypeDef>
 652           </spirit:wireTypeDefs>
 653         </spirit:wire>
 654       </spirit:port>
 655       <spirit:port>
 656         <spirit:name>s00_axi_awaddr</spirit:name>
 657         <spirit:wire>
 658           <spirit:direction>in</spirit:direction>
 659           <spirit:vector>
 660             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_S00_AXI_ADDR_WIDTH&apos;)) - 1)">5</spirit:left>
 661             <spirit:right spirit:format="long">0</spirit:right>
 662           </spirit:vector>
 663           <spirit:wireTypeDefs>
 664             <spirit:wireTypeDef>
 665               <spirit:typeName>std_logic_vector</spirit:typeName>
 666               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 667               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 668             </spirit:wireTypeDef>
 669           </spirit:wireTypeDefs>
 670         </spirit:wire>
 671       </spirit:port>
 672       <spirit:port>
 673         <spirit:name>s00_axi_awprot</spirit:name>
 674         <spirit:wire>
 675           <spirit:direction>in</spirit:direction>
 676           <spirit:vector>
 677             <spirit:left spirit:format="long">2</spirit:left>
 678             <spirit:right spirit:format="long">0</spirit:right>
 679           </spirit:vector>
 680           <spirit:wireTypeDefs>
 681             <spirit:wireTypeDef>
 682               <spirit:typeName>std_logic_vector</spirit:typeName>
 683               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 684               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 685             </spirit:wireTypeDef>
 686           </spirit:wireTypeDefs>
 687         </spirit:wire>
 688       </spirit:port>
 689       <spirit:port>
 690         <spirit:name>s00_axi_awvalid</spirit:name>
 691         <spirit:wire>
 692           <spirit:direction>in</spirit:direction>
 693           <spirit:wireTypeDefs>
 694             <spirit:wireTypeDef>
 695               <spirit:typeName>std_logic</spirit:typeName>
 696               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 697               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 698             </spirit:wireTypeDef>
 699           </spirit:wireTypeDefs>
 700         </spirit:wire>
 701       </spirit:port>
 702       <spirit:port>
 703         <spirit:name>s00_axi_awready</spirit:name>
 704         <spirit:wire>
 705           <spirit:direction>out</spirit:direction>
 706           <spirit:wireTypeDefs>
 707             <spirit:wireTypeDef>
 708               <spirit:typeName>std_logic</spirit:typeName>
 709               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 710               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 711             </spirit:wireTypeDef>
 712           </spirit:wireTypeDefs>
 713         </spirit:wire>
 714       </spirit:port>
 715       <spirit:port>
 716         <spirit:name>s00_axi_wdata</spirit:name>
 717         <spirit:wire>
 718           <spirit:direction>in</spirit:direction>
 719           <spirit:vector>
 720             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_S00_AXI_DATA_WIDTH&apos;)) - 1)">31</spirit:left>
 721             <spirit:right spirit:format="long">0</spirit:right>
 722           </spirit:vector>
 723           <spirit:wireTypeDefs>
 724             <spirit:wireTypeDef>
 725               <spirit:typeName>std_logic_vector</spirit:typeName>
 726               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 727               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 728             </spirit:wireTypeDef>
 729           </spirit:wireTypeDefs>
 730         </spirit:wire>
 731       </spirit:port>
 732       <spirit:port>
 733         <spirit:name>s00_axi_wstrb</spirit:name>
 734         <spirit:wire>
 735           <spirit:direction>in</spirit:direction>
 736           <spirit:vector>
 737             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(&apos;MODELPARAM_VALUE.C_S00_AXI_DATA_WIDTH&apos;)) / 8) - 1)">3</spirit:left>
 738             <spirit:right spirit:format="long">0</spirit:right>
 739           </spirit:vector>
 740           <spirit:wireTypeDefs>
 741             <spirit:wireTypeDef>
 742               <spirit:typeName>std_logic_vector</spirit:typeName>
 743               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 744               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 745             </spirit:wireTypeDef>
 746           </spirit:wireTypeDefs>
 747         </spirit:wire>
 748       </spirit:port>
 749       <spirit:port>
 750         <spirit:name>s00_axi_wvalid</spirit:name>
 751         <spirit:wire>
 752           <spirit:direction>in</spirit:direction>
 753           <spirit:wireTypeDefs>
 754             <spirit:wireTypeDef>
 755               <spirit:typeName>std_logic</spirit:typeName>
 756               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 757               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 758             </spirit:wireTypeDef>
 759           </spirit:wireTypeDefs>
 760         </spirit:wire>
 761       </spirit:port>
 762       <spirit:port>
 763         <spirit:name>s00_axi_wready</spirit:name>
 764         <spirit:wire>
 765           <spirit:direction>out</spirit:direction>
 766           <spirit:wireTypeDefs>
 767             <spirit:wireTypeDef>
 768               <spirit:typeName>std_logic</spirit:typeName>
 769               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 770               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 771             </spirit:wireTypeDef>
 772           </spirit:wireTypeDefs>
 773         </spirit:wire>
 774       </spirit:port>
 775       <spirit:port>
 776         <spirit:name>s00_axi_bresp</spirit:name>
 777         <spirit:wire>
 778           <spirit:direction>out</spirit:direction>
 779           <spirit:vector>
 780             <spirit:left spirit:format="long">1</spirit:left>
 781             <spirit:right spirit:format="long">0</spirit:right>
 782           </spirit:vector>
 783           <spirit:wireTypeDefs>
 784             <spirit:wireTypeDef>
 785               <spirit:typeName>std_logic_vector</spirit:typeName>
 786               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 787               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 788             </spirit:wireTypeDef>
 789           </spirit:wireTypeDefs>
 790         </spirit:wire>
 791       </spirit:port>
 792       <spirit:port>
 793         <spirit:name>s00_axi_bvalid</spirit:name>
 794         <spirit:wire>
 795           <spirit:direction>out</spirit:direction>
 796           <spirit:wireTypeDefs>
 797             <spirit:wireTypeDef>
 798               <spirit:typeName>std_logic</spirit:typeName>
 799               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 800               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 801             </spirit:wireTypeDef>
 802           </spirit:wireTypeDefs>
 803         </spirit:wire>
 804       </spirit:port>
 805       <spirit:port>
 806         <spirit:name>s00_axi_bready</spirit:name>
 807         <spirit:wire>
 808           <spirit:direction>in</spirit:direction>
 809           <spirit:wireTypeDefs>
 810             <spirit:wireTypeDef>
 811               <spirit:typeName>std_logic</spirit:typeName>
 812               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 813               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 814             </spirit:wireTypeDef>
 815           </spirit:wireTypeDefs>
 816         </spirit:wire>
 817       </spirit:port>
 818       <spirit:port>
 819         <spirit:name>s00_axi_araddr</spirit:name>
 820         <spirit:wire>
 821           <spirit:direction>in</spirit:direction>
 822           <spirit:vector>
 823             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_S00_AXI_ADDR_WIDTH&apos;)) - 1)">5</spirit:left>
 824             <spirit:right spirit:format="long">0</spirit:right>
 825           </spirit:vector>
 826           <spirit:wireTypeDefs>
 827             <spirit:wireTypeDef>
 828               <spirit:typeName>std_logic_vector</spirit:typeName>
 829               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 830               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 831             </spirit:wireTypeDef>
 832           </spirit:wireTypeDefs>
 833         </spirit:wire>
 834       </spirit:port>
 835       <spirit:port>
 836         <spirit:name>s00_axi_arprot</spirit:name>
 837         <spirit:wire>
 838           <spirit:direction>in</spirit:direction>
 839           <spirit:vector>
 840             <spirit:left spirit:format="long">2</spirit:left>
 841             <spirit:right spirit:format="long">0</spirit:right>
 842           </spirit:vector>
 843           <spirit:wireTypeDefs>
 844             <spirit:wireTypeDef>
 845               <spirit:typeName>std_logic_vector</spirit:typeName>
 846               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 847               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 848             </spirit:wireTypeDef>
 849           </spirit:wireTypeDefs>
 850         </spirit:wire>
 851       </spirit:port>
 852       <spirit:port>
 853         <spirit:name>s00_axi_arvalid</spirit:name>
 854         <spirit:wire>
 855           <spirit:direction>in</spirit:direction>
 856           <spirit:wireTypeDefs>
 857             <spirit:wireTypeDef>
 858               <spirit:typeName>std_logic</spirit:typeName>
 859               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 860               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 861             </spirit:wireTypeDef>
 862           </spirit:wireTypeDefs>
 863         </spirit:wire>
 864       </spirit:port>
 865       <spirit:port>
 866         <spirit:name>s00_axi_arready</spirit:name>
 867         <spirit:wire>
 868           <spirit:direction>out</spirit:direction>
 869           <spirit:wireTypeDefs>
 870             <spirit:wireTypeDef>
 871               <spirit:typeName>std_logic</spirit:typeName>
 872               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 873               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 874             </spirit:wireTypeDef>
 875           </spirit:wireTypeDefs>
 876         </spirit:wire>
 877       </spirit:port>
 878       <spirit:port>
 879         <spirit:name>s00_axi_rdata</spirit:name>
 880         <spirit:wire>
 881           <spirit:direction>out</spirit:direction>
 882           <spirit:vector>
 883             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_S00_AXI_DATA_WIDTH&apos;)) - 1)">31</spirit:left>
 884             <spirit:right spirit:format="long">0</spirit:right>
 885           </spirit:vector>
 886           <spirit:wireTypeDefs>
 887             <spirit:wireTypeDef>
 888               <spirit:typeName>std_logic_vector</spirit:typeName>
 889               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 890               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 891             </spirit:wireTypeDef>
 892           </spirit:wireTypeDefs>
 893         </spirit:wire>
 894       </spirit:port>
 895       <spirit:port>
 896         <spirit:name>s00_axi_rresp</spirit:name>
 897         <spirit:wire>
 898           <spirit:direction>out</spirit:direction>
 899           <spirit:vector>
 900             <spirit:left spirit:format="long">1</spirit:left>
 901             <spirit:right spirit:format="long">0</spirit:right>
 902           </spirit:vector>
 903           <spirit:wireTypeDefs>
 904             <spirit:wireTypeDef>
 905               <spirit:typeName>std_logic_vector</spirit:typeName>
 906               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 907               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 908             </spirit:wireTypeDef>
 909           </spirit:wireTypeDefs>
 910         </spirit:wire>
 911       </spirit:port>
 912       <spirit:port>
 913         <spirit:name>s00_axi_rvalid</spirit:name>
 914         <spirit:wire>
 915           <spirit:direction>out</spirit:direction>
 916           <spirit:wireTypeDefs>
 917             <spirit:wireTypeDef>
 918               <spirit:typeName>std_logic</spirit:typeName>
 919               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 920               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 921             </spirit:wireTypeDef>
 922           </spirit:wireTypeDefs>
 923         </spirit:wire>
 924       </spirit:port>
 925       <spirit:port>
 926         <spirit:name>s00_axi_rready</spirit:name>
 927         <spirit:wire>
 928           <spirit:direction>in</spirit:direction>
 929           <spirit:wireTypeDefs>
 930             <spirit:wireTypeDef>
 931               <spirit:typeName>std_logic</spirit:typeName>
 932               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 933               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 934             </spirit:wireTypeDef>
 935           </spirit:wireTypeDefs>
 936         </spirit:wire>
 937       </spirit:port>
 938       <spirit:port>
 939         <spirit:name>s00_axi_aclk</spirit:name>
 940         <spirit:wire>
 941           <spirit:direction>in</spirit:direction>
 942           <spirit:wireTypeDefs>
 943             <spirit:wireTypeDef>
 944               <spirit:typeName>std_logic</spirit:typeName>
 945               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 946               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 947             </spirit:wireTypeDef>
 948           </spirit:wireTypeDefs>
 949         </spirit:wire>
 950       </spirit:port>
 951       <spirit:port>
 952         <spirit:name>s00_axi_aresetn</spirit:name>
 953         <spirit:wire>
 954           <spirit:direction>in</spirit:direction>
 955           <spirit:wireTypeDefs>
 956             <spirit:wireTypeDef>
 957               <spirit:typeName>std_logic</spirit:typeName>
 958               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 959               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 960             </spirit:wireTypeDef>
 961           </spirit:wireTypeDefs>
 962         </spirit:wire>
 963       </spirit:port>
 964       <spirit:port>
 965         <spirit:name>m00_axi_awaddr</spirit:name>
 966         <spirit:wire>
 967           <spirit:direction>out</spirit:direction>
 968           <spirit:vector>
 969             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_M00_AXI_ADDR_WIDTH&apos;)) - 1)">31</spirit:left>
 970             <spirit:right spirit:format="long">0</spirit:right>
 971           </spirit:vector>
 972           <spirit:wireTypeDefs>
 973             <spirit:wireTypeDef>
 974               <spirit:typeName>std_logic_vector</spirit:typeName>
 975               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 976               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 977             </spirit:wireTypeDef>
 978           </spirit:wireTypeDefs>
 979         </spirit:wire>
 980       </spirit:port>
 981       <spirit:port>
 982         <spirit:name>m00_axi_awprot</spirit:name>
 983         <spirit:wire>
 984           <spirit:direction>out</spirit:direction>
 985           <spirit:vector>
 986             <spirit:left spirit:format="long">2</spirit:left>
 987             <spirit:right spirit:format="long">0</spirit:right>
 988           </spirit:vector>
 989           <spirit:wireTypeDefs>
 990             <spirit:wireTypeDef>
 991               <spirit:typeName>std_logic_vector</spirit:typeName>
 992               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
 993               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
 994             </spirit:wireTypeDef>
 995           </spirit:wireTypeDefs>
 996         </spirit:wire>
 997       </spirit:port>
 998       <spirit:port>
 999         <spirit:name>m00_axi_awvalid</spirit:name>
1000         <spirit:wire>
1001           <spirit:direction>out</spirit:direction>
1002           <spirit:wireTypeDefs>
1003             <spirit:wireTypeDef>
1004               <spirit:typeName>std_logic</spirit:typeName>
1005               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1006               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1007             </spirit:wireTypeDef>
1008           </spirit:wireTypeDefs>
1009         </spirit:wire>
1010       </spirit:port>
1011       <spirit:port>
1012         <spirit:name>m00_axi_awready</spirit:name>
1013         <spirit:wire>
1014           <spirit:direction>in</spirit:direction>
1015           <spirit:wireTypeDefs>
1016             <spirit:wireTypeDef>
1017               <spirit:typeName>std_logic</spirit:typeName>
1018               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1019               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1020             </spirit:wireTypeDef>
1021           </spirit:wireTypeDefs>
1022         </spirit:wire>
1023       </spirit:port>
1024       <spirit:port>
1025         <spirit:name>m00_axi_wdata</spirit:name>
1026         <spirit:wire>
1027           <spirit:direction>out</spirit:direction>
1028           <spirit:vector>
1029             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_M00_AXI_DATA_WIDTH&apos;)) - 1)">31</spirit:left>
1030             <spirit:right spirit:format="long">0</spirit:right>
1031           </spirit:vector>
1032           <spirit:wireTypeDefs>
1033             <spirit:wireTypeDef>
1034               <spirit:typeName>std_logic_vector</spirit:typeName>
1035               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1036               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1037             </spirit:wireTypeDef>
1038           </spirit:wireTypeDefs>
1039         </spirit:wire>
1040       </spirit:port>
1041       <spirit:port>
1042         <spirit:name>m00_axi_wstrb</spirit:name>
1043         <spirit:wire>
1044           <spirit:direction>out</spirit:direction>
1045           <spirit:vector>
1046             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(&apos;MODELPARAM_VALUE.C_M00_AXI_DATA_WIDTH&apos;)) / 8) - 1)">3</spirit:left>
1047             <spirit:right spirit:format="long">0</spirit:right>
1048           </spirit:vector>
1049           <spirit:wireTypeDefs>
1050             <spirit:wireTypeDef>
1051               <spirit:typeName>std_logic_vector</spirit:typeName>
1052               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1053               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1054             </spirit:wireTypeDef>
1055           </spirit:wireTypeDefs>
1056         </spirit:wire>
1057       </spirit:port>
1058       <spirit:port>
1059         <spirit:name>m00_axi_wvalid</spirit:name>
1060         <spirit:wire>
1061           <spirit:direction>out</spirit:direction>
1062           <spirit:wireTypeDefs>
1063             <spirit:wireTypeDef>
1064               <spirit:typeName>std_logic</spirit:typeName>
1065               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1066               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1067             </spirit:wireTypeDef>
1068           </spirit:wireTypeDefs>
1069         </spirit:wire>
1070       </spirit:port>
1071       <spirit:port>
1072         <spirit:name>m00_axi_wready</spirit:name>
1073         <spirit:wire>
1074           <spirit:direction>in</spirit:direction>
1075           <spirit:wireTypeDefs>
1076             <spirit:wireTypeDef>
1077               <spirit:typeName>std_logic</spirit:typeName>
1078               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1079               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1080             </spirit:wireTypeDef>
1081           </spirit:wireTypeDefs>
1082         </spirit:wire>
1083       </spirit:port>
1084       <spirit:port>
1085         <spirit:name>m00_axi_bresp</spirit:name>
1086         <spirit:wire>
1087           <spirit:direction>in</spirit:direction>
1088           <spirit:vector>
1089             <spirit:left spirit:format="long">1</spirit:left>
1090             <spirit:right spirit:format="long">0</spirit:right>
1091           </spirit:vector>
1092           <spirit:wireTypeDefs>
1093             <spirit:wireTypeDef>
1094               <spirit:typeName>std_logic_vector</spirit:typeName>
1095               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1096               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1097             </spirit:wireTypeDef>
1098           </spirit:wireTypeDefs>
1099         </spirit:wire>
1100       </spirit:port>
1101       <spirit:port>
1102         <spirit:name>m00_axi_bvalid</spirit:name>
1103         <spirit:wire>
1104           <spirit:direction>in</spirit:direction>
1105           <spirit:wireTypeDefs>
1106             <spirit:wireTypeDef>
1107               <spirit:typeName>std_logic</spirit:typeName>
1108               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1109               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1110             </spirit:wireTypeDef>
1111           </spirit:wireTypeDefs>
1112         </spirit:wire>
1113       </spirit:port>
1114       <spirit:port>
1115         <spirit:name>m00_axi_bready</spirit:name>
1116         <spirit:wire>
1117           <spirit:direction>out</spirit:direction>
1118           <spirit:wireTypeDefs>
1119             <spirit:wireTypeDef>
1120               <spirit:typeName>std_logic</spirit:typeName>
1121               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1122               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1123             </spirit:wireTypeDef>
1124           </spirit:wireTypeDefs>
1125         </spirit:wire>
1126       </spirit:port>
1127       <spirit:port>
1128         <spirit:name>m00_axi_araddr</spirit:name>
1129         <spirit:wire>
1130           <spirit:direction>out</spirit:direction>
1131           <spirit:vector>
1132             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_M00_AXI_ADDR_WIDTH&apos;)) - 1)">31</spirit:left>
1133             <spirit:right spirit:format="long">0</spirit:right>
1134           </spirit:vector>
1135           <spirit:wireTypeDefs>
1136             <spirit:wireTypeDef>
1137               <spirit:typeName>std_logic_vector</spirit:typeName>
1138               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1139               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1140             </spirit:wireTypeDef>
1141           </spirit:wireTypeDefs>
1142         </spirit:wire>
1143       </spirit:port>
1144       <spirit:port>
1145         <spirit:name>m00_axi_arprot</spirit:name>
1146         <spirit:wire>
1147           <spirit:direction>out</spirit:direction>
1148           <spirit:vector>
1149             <spirit:left spirit:format="long">2</spirit:left>
1150             <spirit:right spirit:format="long">0</spirit:right>
1151           </spirit:vector>
1152           <spirit:wireTypeDefs>
1153             <spirit:wireTypeDef>
1154               <spirit:typeName>std_logic_vector</spirit:typeName>
1155               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1156               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1157             </spirit:wireTypeDef>
1158           </spirit:wireTypeDefs>
1159         </spirit:wire>
1160       </spirit:port>
1161       <spirit:port>
1162         <spirit:name>m00_axi_arvalid</spirit:name>
1163         <spirit:wire>
1164           <spirit:direction>out</spirit:direction>
1165           <spirit:wireTypeDefs>
1166             <spirit:wireTypeDef>
1167               <spirit:typeName>std_logic</spirit:typeName>
1168               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1169               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1170             </spirit:wireTypeDef>
1171           </spirit:wireTypeDefs>
1172         </spirit:wire>
1173       </spirit:port>
1174       <spirit:port>
1175         <spirit:name>m00_axi_arready</spirit:name>
1176         <spirit:wire>
1177           <spirit:direction>in</spirit:direction>
1178           <spirit:wireTypeDefs>
1179             <spirit:wireTypeDef>
1180               <spirit:typeName>std_logic</spirit:typeName>
1181               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1182               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1183             </spirit:wireTypeDef>
1184           </spirit:wireTypeDefs>
1185         </spirit:wire>
1186       </spirit:port>
1187       <spirit:port>
1188         <spirit:name>m00_axi_rdata</spirit:name>
1189         <spirit:wire>
1190           <spirit:direction>in</spirit:direction>
1191           <spirit:vector>
1192             <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_M00_AXI_DATA_WIDTH&apos;)) - 1)">31</spirit:left>
1193             <spirit:right spirit:format="long">0</spirit:right>
1194           </spirit:vector>
1195           <spirit:wireTypeDefs>
1196             <spirit:wireTypeDef>
1197               <spirit:typeName>std_logic_vector</spirit:typeName>
1198               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1199               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1200             </spirit:wireTypeDef>
1201           </spirit:wireTypeDefs>
1202         </spirit:wire>
1203       </spirit:port>
1204       <spirit:port>
1205         <spirit:name>m00_axi_rresp</spirit:name>
1206         <spirit:wire>
1207           <spirit:direction>in</spirit:direction>
1208           <spirit:vector>
1209             <spirit:left spirit:format="long">1</spirit:left>
1210             <spirit:right spirit:format="long">0</spirit:right>
1211           </spirit:vector>
1212           <spirit:wireTypeDefs>
1213             <spirit:wireTypeDef>
1214               <spirit:typeName>std_logic_vector</spirit:typeName>
1215               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1216               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1217             </spirit:wireTypeDef>
1218           </spirit:wireTypeDefs>
1219         </spirit:wire>
1220       </spirit:port>
1221       <spirit:port>
1222         <spirit:name>m00_axi_rvalid</spirit:name>
1223         <spirit:wire>
1224           <spirit:direction>in</spirit:direction>
1225           <spirit:wireTypeDefs>
1226             <spirit:wireTypeDef>
1227               <spirit:typeName>std_logic</spirit:typeName>
1228               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1229               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1230             </spirit:wireTypeDef>
1231           </spirit:wireTypeDefs>
1232         </spirit:wire>
1233       </spirit:port>
1234       <spirit:port>
1235         <spirit:name>m00_axi_rready</spirit:name>
1236         <spirit:wire>
1237           <spirit:direction>out</spirit:direction>
1238           <spirit:wireTypeDefs>
1239             <spirit:wireTypeDef>
1240               <spirit:typeName>std_logic</spirit:typeName>
1241               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1242               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1243             </spirit:wireTypeDef>
1244           </spirit:wireTypeDefs>
1245         </spirit:wire>
1246       </spirit:port>
1247       <spirit:port>
1248         <spirit:name>m00_axi_aclk</spirit:name>
1249         <spirit:wire>
1250           <spirit:direction>in</spirit:direction>
1251           <spirit:wireTypeDefs>
1252             <spirit:wireTypeDef>
1253               <spirit:typeName>std_logic</spirit:typeName>
1254               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1255               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1256             </spirit:wireTypeDef>
1257           </spirit:wireTypeDefs>
1258         </spirit:wire>
1259       </spirit:port>
1260       <spirit:port>
1261         <spirit:name>m00_axi_aresetn</spirit:name>
1262         <spirit:wire>
1263           <spirit:direction>in</spirit:direction>
1264           <spirit:wireTypeDefs>
1265             <spirit:wireTypeDef>
1266               <spirit:typeName>std_logic</spirit:typeName>
1267               <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
1268               <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
1269             </spirit:wireTypeDef>
1270           </spirit:wireTypeDefs>
1271         </spirit:wire>
1272       </spirit:port>
1273     </spirit:ports>
1274     <spirit:modelParameters>
1275       <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="integer">
1276         <spirit:name>C_S00_AXI_DATA_WIDTH</spirit:name>
1277         <spirit:displayName>C S00 AXI DATA WIDTH</spirit:displayName>
1278         <spirit:description>Width of S_AXI data bus</spirit:description>
1279         <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_S00_AXI_DATA_WIDTH" spirit:order="3" spirit:rangeType="long">32</spirit:value>
1280       </spirit:modelParameter>
1281       <spirit:modelParameter spirit:dataType="integer">
1282         <spirit:name>C_S00_AXI_ADDR_WIDTH</spirit:name>
1283         <spirit:displayName>C S00 AXI ADDR WIDTH</spirit:displayName>
1284         <spirit:description>Width of S_AXI address bus</spirit:description>
1285         <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_S00_AXI_ADDR_WIDTH" spirit:order="4" spirit:rangeType="long">6</spirit:value>
1286       </spirit:modelParameter>
1287       <spirit:modelParameter spirit:dataType="std_logic_vector">
1288         <spirit:name>C_M00_AXI_START_DATA_VALUE</spirit:name>
1289         <spirit:displayName>C M00 AXI START DATA VALUE</spirit:displayName>
1290         <spirit:description>The master will start generating data from the C_M_START_DATA_VALUE value</spirit:description>
1291         <spirit:value spirit:format="bitString" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_M00_AXI_START_DATA_VALUE" spirit:order="7" spirit:bitStringLength="32">0xAA000000</spirit:value>
1292       </spirit:modelParameter>
1293       <spirit:modelParameter spirit:dataType="std_logic_vector">
1294         <spirit:name>C_M00_AXI_TARGET_SLAVE_BASE_ADDR</spirit:name>
1295         <spirit:displayName>C M00 AXI TARGET SLAVE BASE ADDR</spirit:displayName>
1296         <spirit:description>The master requires a target slave base address.
1297     -- The master will initiate read and write transactions on the slave with base address specified here as a parameter.</spirit:description>
1298         <spirit:value spirit:format="bitString" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_M00_AXI_TARGET_SLAVE_BASE_ADDR" spirit:order="8" spirit:bitStringLength="32">0x40000000</spirit:value>
1299       </spirit:modelParameter>
1300       <spirit:modelParameter spirit:dataType="integer">
1301         <spirit:name>C_M00_AXI_ADDR_WIDTH</spirit:name>
1302         <spirit:displayName>C M00 AXI ADDR WIDTH</spirit:displayName>
1303         <spirit:description>Width of M_AXI address bus.
1304     -- The master generates the read and write addresses of width specified as C_M_AXI_ADDR_WIDTH.</spirit:description>
1305         <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_M00_AXI_ADDR_WIDTH" spirit:order="9" spirit:rangeType="long">32</spirit:value>
1306       </spirit:modelParameter>
1307       <spirit:modelParameter spirit:dataType="integer">
1308         <spirit:name>C_M00_AXI_DATA_WIDTH</spirit:name>
1309         <spirit:displayName>C M00 AXI DATA WIDTH</spirit:displayName>
1310         <spirit:description>Width of M_AXI data bus.
1311     -- The master issues write data and accept read data where the width of the data bus is C_M_AXI_DATA_WIDTH</spirit:description>
1312         <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_M00_AXI_DATA_WIDTH" spirit:order="10" spirit:rangeType="long">32</spirit:value>
1313       </spirit:modelParameter>
1314       <spirit:modelParameter spirit:dataType="integer">
1315         <spirit:name>C_M00_AXI_TRANSACTIONS_NUM</spirit:name>
1316         <spirit:displayName>C M00 AXI TRANSACTIONS NUM</spirit:displayName>
1317         <spirit:description>Transaction number is the number of write
1318     -- and read transactions the master will perform as a part of this example memory test.</spirit:description>
1319         <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_M00_AXI_TRANSACTIONS_NUM" spirit:order="11" spirit:minimum="1" spirit:rangeType="long">4</spirit:value>
1320       </spirit:modelParameter>
1321     </spirit:modelParameters>
1322   </spirit:model>
1323   <spirit:choices>
1324     <spirit:choice>
1325       <spirit:name>choice_list_6fc15197</spirit:name>
1326       <spirit:enumeration>32</spirit:enumeration>
1327     </spirit:choice>
1328     <spirit:choice>
1329       <spirit:name>choice_pairs_ce1226b1</spirit:name>
1330       <spirit:enumeration spirit:text="true">1</spirit:enumeration>
1331       <spirit:enumeration spirit:text="false">0</spirit:enumeration>
1332     </spirit:choice>
1333   </spirit:choices>
1334   <spirit:fileSets>
1335     <spirit:fileSet>
1336       <spirit:name>xilinx_vhdlsynthesis_view_fileset</spirit:name>
1337       <spirit:file>
1338         <spirit:name>hdl/display_16bit_cmd_data_bus_v1_0_S00_AXI.vhd</spirit:name>
1339         <spirit:fileType>vhdlSource</spirit:fileType>
1340       </spirit:file>
1341       <spirit:file>
1342         <spirit:name>hdl/display_16bit_cmd_data_bus_v1_0_io_fsm.vhd</spirit:name>
1343         <spirit:fileType>vhdlSource</spirit:fileType>
1344       </spirit:file>
1345       <spirit:file>
1346         <spirit:name>hdl/display_16bit_cmd_data_bus_v1_0_M00_AXI.vhd</spirit:name>
1347         <spirit:fileType>vhdlSource</spirit:fileType>
1348       </spirit:file>
1349       <spirit:file>
1350         <spirit:name>hdl/display_16bit_cmd_data_bus_v1_0.vhd</spirit:name>
1351         <spirit:fileType>vhdlSource</spirit:fileType>
1352         <spirit:userFileType>CHECKSUM_038ef7fd</spirit:userFileType>
1353       </spirit:file>
1354     </spirit:fileSet>
1355     <spirit:fileSet>
1356       <spirit:name>xilinx_vhdlbehavioralsimulation_view_fileset</spirit:name>
1357       <spirit:file>
1358         <spirit:name>hdl/display_16bit_cmd_data_bus_v1_0_S00_AXI.vhd</spirit:name>
1359         <spirit:fileType>vhdlSource</spirit:fileType>
1360       </spirit:file>
1361       <spirit:file>
1362         <spirit:name>hdl/display_16bit_cmd_data_bus_v1_0_io_fsm.vhd</spirit:name>
1363         <spirit:fileType>vhdlSource</spirit:fileType>
1364       </spirit:file>
1365       <spirit:file>
1366         <spirit:name>hdl/display_16bit_cmd_data_bus_v1_0_M00_AXI.vhd</spirit:name>
1367         <spirit:fileType>vhdlSource</spirit:fileType>
1368       </spirit:file>
1369       <spirit:file>
1370         <spirit:name>hdl/display_16bit_cmd_data_bus_v1_0.vhd</spirit:name>
1371         <spirit:fileType>vhdlSource</spirit:fileType>
1372       </spirit:file>
1373     </spirit:fileSet>
1374     <spirit:fileSet>
1375       <spirit:name>xilinx_softwaredriver_view_fileset</spirit:name>
1376       <spirit:file>
1377         <spirit:name>drivers/display_16bit_cmd_data_bus_v1_0/data/display_16bit_cmd_data_bus.mdd</spirit:name>
1378         <spirit:userFileType>mdd</spirit:userFileType>
1379         <spirit:userFileType>driver_mdd</spirit:userFileType>
1380       </spirit:file>
1381       <spirit:file>
1382         <spirit:name>drivers/display_16bit_cmd_data_bus_v1_0/data/display_16bit_cmd_data_bus.tcl</spirit:name>
1383         <spirit:fileType>tclSource</spirit:fileType>
1384         <spirit:userFileType>driver_tcl</spirit:userFileType>
1385       </spirit:file>
1386       <spirit:file>
1387         <spirit:name>drivers/display_16bit_cmd_data_bus_v1_0/src/Makefile</spirit:name>
1388         <spirit:userFileType>driver_src</spirit:userFileType>
1389       </spirit:file>
1390       <spirit:file>
1391         <spirit:name>drivers/display_16bit_cmd_data_bus_v1_0/src/display_16bit_cmd_data_bus.h</spirit:name>
1392         <spirit:fileType>cSource</spirit:fileType>
1393         <spirit:userFileType>driver_src</spirit:userFileType>
1394       </spirit:file>
1395       <spirit:file>
1396         <spirit:name>drivers/display_16bit_cmd_data_bus_v1_0/src/display_16bit_cmd_data_bus.c</spirit:name>
1397         <spirit:fileType>cSource</spirit:fileType>
1398         <spirit:userFileType>driver_src</spirit:userFileType>
1399       </spirit:file>
1400       <spirit:file>
1401         <spirit:name>drivers/display_16bit_cmd_data_bus_v1_0/src/display_16bit_cmd_data_bus_selftest.c</spirit:name>
1402         <spirit:fileType>cSource</spirit:fileType>
1403         <spirit:userFileType>driver_src</spirit:userFileType>
1404       </spirit:file>
1405     </spirit:fileSet>
1406     <spirit:fileSet>
1407       <spirit:name>xilinx_xpgui_view_fileset</spirit:name>
1408       <spirit:file>
1409         <spirit:name>xgui/display_16bit_cmd_data_bus_v1_0.tcl</spirit:name>
1410         <spirit:fileType>tclSource</spirit:fileType>
1411         <spirit:userFileType>CHECKSUM_b09a532b</spirit:userFileType>
1412         <spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
1413       </spirit:file>
1414     </spirit:fileSet>
1415     <spirit:fileSet>
1416       <spirit:name>bd_tcl_view_fileset</spirit:name>
1417       <spirit:file>
1418         <spirit:name>bd/bd.tcl</spirit:name>
1419         <spirit:fileType>tclSource</spirit:fileType>
1420       </spirit:file>
1421     </spirit:fileSet>
1422   </spirit:fileSets>
1423   <spirit:description>My new AXI IP</spirit:description>
1424   <spirit:parameters>
1425     <spirit:parameter>
1426       <spirit:name>C_S00_AXI_DATA_WIDTH</spirit:name>
1427       <spirit:displayName>C S00 AXI DATA WIDTH</spirit:displayName>
1428       <spirit:description>Width of S_AXI data bus</spirit:description>
1429       <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_S00_AXI_DATA_WIDTH" spirit:choiceRef="choice_list_6fc15197" spirit:order="3">32</spirit:value>
1430       <spirit:vendorExtensions>
1431         <xilinx:parameterInfo>
1432           <xilinx:enablement>
1433             <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.C_S00_AXI_DATA_WIDTH">false</xilinx:isEnabled>
1434           </xilinx:enablement>
1435         </xilinx:parameterInfo>
1436       </spirit:vendorExtensions>
1437     </spirit:parameter>
1438     <spirit:parameter>
1439       <spirit:name>C_S00_AXI_ADDR_WIDTH</spirit:name>
1440       <spirit:displayName>C S00 AXI ADDR WIDTH</spirit:displayName>
1441       <spirit:description>Width of S_AXI address bus</spirit:description>
1442       <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_S00_AXI_ADDR_WIDTH" spirit:order="4" spirit:rangeType="long">6</spirit:value>
1443       <spirit:vendorExtensions>
1444         <xilinx:parameterInfo>
1445           <xilinx:enablement>
1446             <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.C_S00_AXI_ADDR_WIDTH">false</xilinx:isEnabled>
1447           </xilinx:enablement>
1448         </xilinx:parameterInfo>
1449       </spirit:vendorExtensions>
1450     </spirit:parameter>
1451     <spirit:parameter>
1452       <spirit:name>C_S00_AXI_BASEADDR</spirit:name>
1453       <spirit:displayName>C S00 AXI BASEADDR</spirit:displayName>
1454       <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_S00_AXI_BASEADDR" spirit:order="5" spirit:bitStringLength="32">0xFFFFFFFF</spirit:value>
1455       <spirit:vendorExtensions>
1456         <xilinx:parameterInfo>
1457           <xilinx:enablement>
1458             <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.C_S00_AXI_BASEADDR">false</xilinx:isEnabled>
1459           </xilinx:enablement>
1460         </xilinx:parameterInfo>
1461       </spirit:vendorExtensions>
1462     </spirit:parameter>
1463     <spirit:parameter>
1464       <spirit:name>C_S00_AXI_HIGHADDR</spirit:name>
1465       <spirit:displayName>C S00 AXI HIGHADDR</spirit:displayName>
1466       <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_S00_AXI_HIGHADDR" spirit:order="6" spirit:bitStringLength="32">0x00000000</spirit:value>
1467       <spirit:vendorExtensions>
1468         <xilinx:parameterInfo>
1469           <xilinx:enablement>
1470             <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.C_S00_AXI_HIGHADDR">false</xilinx:isEnabled>
1471           </xilinx:enablement>
1472         </xilinx:parameterInfo>
1473       </spirit:vendorExtensions>
1474     </spirit:parameter>
1475     <spirit:parameter>
1476       <spirit:name>C_M00_AXI_START_DATA_VALUE</spirit:name>
1477       <spirit:displayName>C M00 AXI START DATA VALUE</spirit:displayName>
1478       <spirit:description>The master will start generating data from the C_M_START_DATA_VALUE value</spirit:description>
1479       <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_M00_AXI_START_DATA_VALUE" spirit:order="7" spirit:bitStringLength="32">0xAA000000</spirit:value>
1480     </spirit:parameter>
1481     <spirit:parameter>
1482       <spirit:name>C_M00_AXI_TARGET_SLAVE_BASE_ADDR</spirit:name>
1483       <spirit:displayName>C M00 AXI TARGET SLAVE BASE ADDR</spirit:displayName>
1484       <spirit:description>The master requires a target slave base address.
1485     -- The master will initiate read and write transactions on the slave with base address specified here as a parameter.</spirit:description>
1486       <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_M00_AXI_TARGET_SLAVE_BASE_ADDR" spirit:order="8" spirit:bitStringLength="32">0x40000000</spirit:value>
1487     </spirit:parameter>
1488     <spirit:parameter>
1489       <spirit:name>C_M00_AXI_ADDR_WIDTH</spirit:name>
1490       <spirit:displayName>C M00 AXI ADDR WIDTH</spirit:displayName>
1491       <spirit:description>Width of M_AXI address bus.
1492     -- The master generates the read and write addresses of width specified as C_M_AXI_ADDR_WIDTH.</spirit:description>
1493       <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_M00_AXI_ADDR_WIDTH" spirit:order="9" spirit:rangeType="long">32</spirit:value>
1494       <spirit:vendorExtensions>
1495         <xilinx:parameterInfo>
1496           <xilinx:enablement>
1497             <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.C_M00_AXI_ADDR_WIDTH">false</xilinx:isEnabled>
1498           </xilinx:enablement>
1499         </xilinx:parameterInfo>
1500       </spirit:vendorExtensions>
1501     </spirit:parameter>
1502     <spirit:parameter>
1503       <spirit:name>C_M00_AXI_DATA_WIDTH</spirit:name>
1504       <spirit:displayName>C M00 AXI DATA WIDTH</spirit:displayName>
1505       <spirit:description>Width of M_AXI data bus.
1506     -- The master issues write data and accept read data where the width of the data bus is C_M_AXI_DATA_WIDTH</spirit:description>
1507       <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_M00_AXI_DATA_WIDTH" spirit:choiceRef="choice_list_6fc15197" spirit:order="10">32</spirit:value>
1508       <spirit:vendorExtensions>
1509         <xilinx:parameterInfo>
1510           <xilinx:enablement>
1511             <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.C_M00_AXI_DATA_WIDTH">false</xilinx:isEnabled>
1512           </xilinx:enablement>
1513         </xilinx:parameterInfo>
1514       </spirit:vendorExtensions>
1515     </spirit:parameter>
1516     <spirit:parameter>
1517       <spirit:name>C_M00_AXI_TRANSACTIONS_NUM</spirit:name>
1518       <spirit:displayName>C M00 AXI TRANSACTIONS NUM</spirit:displayName>
1519       <spirit:description>Transaction number is the number of write
1520     -- and read transactions the master will perform as a part of this example memory test.</spirit:description>
1521       <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_M00_AXI_TRANSACTIONS_NUM" spirit:order="11" spirit:minimum="1" spirit:rangeType="long">4</spirit:value>
1522     </spirit:parameter>
1523     <spirit:parameter>
1524       <spirit:name>Component_Name</spirit:name>
1525       <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">display_16bit_cmd_data_bus_v1_0</spirit:value>
1526     </spirit:parameter>
1527   </spirit:parameters>
1528   <spirit:vendorExtensions>
1529     <xilinx:coreExtensions>
1530       <xilinx:supportedFamilies>
1531         <xilinx:family xilinx:lifeCycle="Pre-Production">zynq</xilinx:family>
1532       </xilinx:supportedFamilies>
1533       <xilinx:taxonomies>
1534         <xilinx:taxonomy>AXI_Peripheral</xilinx:taxonomy>
1535       </xilinx:taxonomies>
1536       <xilinx:displayName>display_16bit_cmd_data_bus_v1.0</xilinx:displayName>
1537       <xilinx:coreRevision>4</xilinx:coreRevision>
1538       <xilinx:coreCreationDateTime>2017-02-14T13:49:08Z</xilinx:coreCreationDateTime>
1539       <xilinx:tags>
1540         <xilinx:tag xilinx:name="user.org:user:display_16bit_cmd_data_bus:1.0_ARCHIVE_LOCATION">/home/pi/fpga/zynq/canbech-sw/system/ip/display_16bit_cmd_data_bus_1.0</xilinx:tag>
1541       </xilinx:tags>
1542     </xilinx:coreExtensions>
1543     <xilinx:packagingInfo>
1544       <xilinx:xilinxVersion>2016.1</xilinx:xilinxVersion>
1545       <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="4150380b"/>
1546       <xilinx:checksum xilinx:scope="addressSpaces" xilinx:value="64346dae"/>
1547       <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="493665f4"/>
1548       <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="67328ef0"/>
1549       <xilinx:checksum xilinx:scope="ports" xilinx:value="b78ab47f"/>
1550       <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="07a22c67"/>
1551       <xilinx:checksum xilinx:scope="parameters" xilinx:value="6eae480a"/>
1552     </xilinx:packagingInfo>
1553   </spirit:vendorExtensions>
1554 </spirit:component>