]> rtime.felk.cvut.cz Git - fpga/virtex2/uart.git/history - coregen/rom_8x2k_readme.txt
projects / fpga / virtex2 / uart.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
Copied all needed files.
[fpga/virtex2/uart.git] / coregen / rom_8x2k_readme.txt
2011-01-09 Vladimir BurianCopied all needed files. blob | commitdiff | raw
MSP430 simple UART echo - test top level design for Virtex 2 V2MB1000 board