Omsp_quadcount periphery changed.

[fpga/virtex2/uart.git] / openMSP430_uart.vhd

diff --git a/openMSP430_uart.vhd b/openMSP430_uart.vhd
index d742fe2cd8a1ca1d14a470424b465fb9d20c9087..27c4acccb0029cf81c43036a0dcf00cc5755db15 100644 (file)
--- a/openMSP430_uart.vhd
+++ b/openMSP430_uart.vhd
@@ -78,20 +78,20 @@ architecture rtl of openMSP430_uart is
   end component;
 
   component omsp_quadcount is
+    generic (
+      ADDR : std_logic_vector (15 downto 0));
     port (
-      mclk        : in  std_logic;
-      per_addr    : in  std_logic_vector (7  downto 0);
-      per_din     : in  std_logic_vector (15 downto 0);  -- unused
-      per_en      : in  std_logic;
-      per_wen     : in  std_logic_vector (1  downto 0);  -- unused
-      puc         : in  std_logic;                       -- unused
-      per_irq_acc : in  std_logic;                       -- unused
-      per_irq     : out std_logic;                       -- unused
-      per_dout    : out std_logic_vector (15 downto 0);
-      
-      qcount      : in  std_logic_vector (31 downto 0)
-    );
-  end component;
+      mclk     : in  std_logic;
+      puc      : in  std_logic;
+      per_addr : in  std_logic_vector (7 downto 0);
+      per_en   : in  std_logic;
+      per_irq  : out std_logic;
+      per_dout : out std_logic_vector (15 downto 0);
+      qclk     : in  std_logic;
+      qreset   : in  std_logic;
+      a0, b0   : in  std_logic;
+      qcount   : out std_logic_vector (31 downto 0));
+  end component omsp_quadcount;
   
   component uart is
     port (
@@ -110,17 +110,6 @@ architecture rtl of openMSP430_uart is
     );
   end component;
 
-  component qcounter is
-    port (
-      clock    : in std_logic;
-      reset    : in std_logic;
-      a0, b0   : in std_logic;
-      qcount   : out std_logic_vector (31 downto 0);
-      a_rise, a_fall, b_rise, b_fall, ab_event : out std_logic;
-      ab_error : out std_logic
-    );
-  end component;
-
 
   signal mclk : std_logic;
   signal puc : std_logic;
@@ -153,7 +142,6 @@ architecture rtl of openMSP430_uart is
   signal uart_dout : std_logic_vector (15 downto 0);
   signal uart_irq  : std_logic;
 
-  signal qcount : std_logic_vector (31 downto 0);
 
 --------------------------------------------------------------------------------
 
@@ -226,18 +214,21 @@ begin
     we => '1'
   );
 
-  omsp_quadcount_0 : omsp_quadcount port map (
-    mclk        => mclk,
-    per_addr    => per_addr,
-    per_din     => (others => '0'),
-    per_en      => per_en,
-    per_wen     => "00",
-    puc         => '0',
-    per_irq_acc => '0',
-    per_irq     => omsp_quadcount_irq,
-    per_dout    => omsp_quadcount_dout,
-    
-    qcount      => qcount
+  omsp_quadcount_1: omsp_quadcount
+    generic map (
+      ADDR => X"0150")
+    port map (
+      mclk     => mclk,
+      puc      => puc,
+      per_addr => per_addr,
+      per_en   => per_en,
+      per_irq  => omsp_quadcount_irq,
+      per_dout => omsp_quadcount_dout,
+      qclk     => mclk,
+      qreset   => ROT_PRESS,
+      a0       => ROT_A,
+      b0       => ROT_B,
+      qcount   => open
   );
 
   uart_o : uart port map (
@@ -255,19 +246,6 @@ begin
     txd         => RXD
   );
 
-  qcounter_0 : qcounter port map (
-    clock     => mclk,
-    reset     => ROT_PRESS,
-    a0        => ROT_A,
-    b0        => ROT_B,
-    qcount    => qcount,
-    a_rise    => open,
-    a_fall    => open,
-    b_rise    => open,
-    b_fall    => open,
-    ab_event  => open,
-    ab_error  => open
-  );
 
 --------------------------------------------------------------------------------