Copied all needed files.

[fpga/virtex2/uart.git] / coregen / ram_8x512.sym

diff --git a/coregen/ram_8x512.sym b/coregen/ram_8x512.sym
new file mode 100644 (file)
index 0000000..8a5ac71
--- /dev/null
+++ b/coregen/ram_8x512.sym
@@ -0,0 +1,40 @@
+VERSION 5
+BEGIN SYMBOL ram_8x512
+SYMBOLTYPE BLOCK
+TIMESTAMP 2011 1 8 22 4 20
+SYMPIN 0 48 Input addr[8:0]
+SYMPIN 0 80 Input din[7:0]
+SYMPIN 0 112 Input we
+SYMPIN 0 144 Input en
+SYMPIN 0 240 Input clk
+SYMPIN 352 48 Output dout[7:0]
+RECTANGLE N 32 0 320 272 
+BEGIN DISPLAY 36 48 PIN addr[8:0] ATTR PinName
+    FONT 24 "Arial"
+END DISPLAY
+BEGIN LINE W 0 48 32 48 
+END LINE
+BEGIN DISPLAY 36 80 PIN din[7:0] ATTR PinName
+    FONT 24 "Arial"
+END DISPLAY
+BEGIN LINE W 0 80 32 80 
+END LINE
+BEGIN DISPLAY 36 112 PIN we ATTR PinName
+    FONT 24 "Arial"
+END DISPLAY
+LINE N 0 112 32 112 
+BEGIN DISPLAY 36 144 PIN en ATTR PinName
+    FONT 24 "Arial"
+END DISPLAY
+LINE N 0 144 32 144 
+BEGIN DISPLAY 36 240 PIN clk ATTR PinName
+    FONT 24 "Arial"
+END DISPLAY
+LINE N 0 240 32 240 
+BEGIN DISPLAY 316 48 PIN dout[7:0] ATTR PinName
+    ALIGNMENT RIGHT
+    FONT 24 "Arial"
+END DISPLAY
+BEGIN LINE W 320 48 352 48 
+END LINE
+END SYMBOL