1 VHDL_MAIN = tb_vector_gen
2 VHDL_ENTITIES = counter.o \
13 ghdl -r $< --stop-time=$(STOP_TIME) --vcd=$<.vcd
16 gtkwave $(VHDL_MAIN).vcd $(VHDL_MAIN).sav
18 $(VHDL_MAIN): $(VHDL_ENTITIES) $(VHDL_MAIN).o
19 ghdl -e -fexplicit --ieee=synopsys $@
22 ghdl -a -fexplicit --ieee=synopsys $<
25 ghdl -a -fexplicit --ieee=synopsys $<
28 rm -Rf *.o *.vcd $(VHDL_MAIN) results.txt work-obj93.cf