Add tracing

diff --git a/hw/core_ctrl.vhd b/hw/core_ctrl.vhd
index ebc8049ba5a99856af7428ae8195922fc91bd663..da5752b3e7765076d4fd744dd0f284bbb62db223 100644 (file)
--- a/hw/core_ctrl.vhd
+++ b/hw/core_ctrl.vhd
@@ -30,6 +30,9 @@ ENTITY core_ctrl IS
         rst_i           :  IN STD_LOGIC;
         halt_i          :  IN STD_LOGIC;
         int_i           :  IN STD_LOGIC;
+        trace_i         :  IN STD_LOGIC;
+        trace_kick_i    :  IN STD_LOGIC;
+        core_clk_en_o   : OUT STD_LOGIC;
         -- specific fetch i/o
         imem_addr_o     : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
         imem_clken_o    : OUT STD_LOGIC;
@@ -78,6 +81,7 @@ ARCHITECTURE rtl OF core_ctrl IS
 
     SIGNAL rst_r          : STD_LOGIC;
     SIGNAL reset_s        : STD_LOGIC;
+    SIGNAL core_clk_en_s  : STD_LOGIC;
 
     SIGNAL ID2EX_REG_r    : ID2EX_Type;
     SIGNAL EX2IF_REG_r    : EX2IF_Type;
@@ -102,6 +106,10 @@ BEGIN
     reset_s        <= rst_i OR rst_r;
     pc_ctrl_o      <= NOT rst_r;
     imem_addr_o    <= IF2ID_REG_i.program_counter;
+    -- Tracing
+    -- Reset_s is 1 when rst_i is one and then gets deactivated
+    core_clk_en_s <= reset_s OR (NOT trace_i) OR trace_kick_i;
+    core_clk_en_o <= core_clk_en_s;
     -- clock/wait control lines
     clken_s        <= MEM2CTRL_i.clken OR rst_i;
     clken_pipe_s   <= clken_s AND (NOT HAZARD_WRB_i.hazard);
@@ -121,7 +129,7 @@ BEGIN
     INT_CTRL_o.int_busy    <= int_busy_r;
 
 regd_proc:
-    PROCESS ( clk_i, rst_i, halt_i,
+    PROCESS ( clk_i, rst_i, halt_i, core_clk_en_s,
               -- complete sensitivity list for synthesizer
               reset_s, MEM2CTRL_i, clken_pipe_s, IF2ID_REG_i,
               flush_ID2EX_s, flush_EX2MEM_s, HAZARD_WRB_i,
@@ -207,7 +215,9 @@ regd_proc:
         END PROCEDURE;
 
     BEGIN
-        IF (RISING_EDGE (clk_i) AND (MEM2CTRL_i.clken = '1')) AND halt_i = '0' THEN
+
+        IF (RISING_EDGE (clk_i) AND (MEM2CTRL_i.clken = '1')) AND halt_i = '0' AND
+                                           core_clk_en_s = '1' THEN
             rst_r <= rst_i;
             IF (reset_s = '1') THEN     -- synchronous reset ...
                 lp_rst_IF2ID_REG;       -- ... so lasts at least one clock_cycle

diff --git a/hw/exeq.vhd b/hw/exeq.vhd
index 04ad287abbcc6b830ed69ad8f28ef8384037df61..6e53725277e73fd5f46c619fd0aef09a3cd70584 100644 (file)
--- a/hw/exeq.vhd
+++ b/hw/exeq.vhd
@@ -343,7 +343,7 @@ p_exeq:
             END CASE;
         END IF;
 
-        -- update MSR[IE], MSR[C] and/or MSR[FSL_Error] if needed
+        -- update MSR[IE] and/or MSR[C] if needed
         IF (ID2EX_i.alu_Action /= A_MTS) THEN
             MSR_o.IE  <= MSR_i.IE;
             IF (ID2EX_i.msr_Action = UPDATE_CARRY) THEN

diff --git a/hw/mbl_Pkg.vhd b/hw/mbl_Pkg.vhd
index 26acc724ae18b1d9e12a15a2578a7c35ab391eea..f3a35bc61c7b44179677d0886fb714bcea32aaa1 100644 (file)
--- a/hw/mbl_Pkg.vhd
+++ b/hw/mbl_Pkg.vhd
@@ -262,6 +262,9 @@ PACKAGE mbl_Pkg IS
             rst_i           :  IN STD_LOGIC;
             halt_i          :  IN STD_LOGIC;
             int_i           :  IN STD_LOGIC;
+            trace_i         :  IN STD_LOGIC;
+            trace_kick_i    :  IN STD_LOGIC;
+            core_clk_en_o   : OUT STD_LOGIC;
             -- specific fetch i/o
             imem_addr_o     : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
             imem_clken_o    : OUT STD_LOGIC;