]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/history - hw/bus_lxmaster.vhd
Remove next_ prefix from chip selects/clock enables to reflect real phase.
[fpga/lx-cpu1/lx-rocon.git] / hw / bus_lxmaster.vhd
2015-02-18 Pavel PisaRemove next_ prefix from chip selects/clock enables...
2014-11-30 Pavel PisaLX master: ensure fully specified state for rx_done_rat...
2014-11-23 Pavel PisaLX Master extended to allow send only each n-th receive...
2014-11-23 Pavel PisaMade LX Master communication frame configurable.
2014-06-17 Pavel PisaProvide output event indication end of reception from...
2014-06-15 Pavel PisaImplemented initial version of LXPWR receiver FSM based...
2014-05-30 Martin MelounLX Master watchdog implemented
2014-05-30 Martin MelounUpdate LX Master transmitter structure layout
2014-05-30 Martin MelounUpdate LX PWR communication
2014-05-27 Pavel PisaMerge 8x IRC support from origin/master branch into...
2014-05-27 Martin MelounSupport 8 IRCs, refactorization (IRC and LXMaster regis...
2014-05-11 Martin MelounMultiple patches