]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/commitdiff
Set of VHDL design workaround to allow whole design compile by GHDL.
authorPavel Pisa <ppisa@pikron.com>
Tue, 30 Dec 2014 08:45:15 +0000 (09:45 +0100)
committerPavel Pisa <ppisa@pikron.com>
Tue, 30 Dec 2014 08:45:15 +0000 (09:45 +0100)
IRC subsystem is removed from lx_rocon_top.vhd because its inclusion
causes exception in GHDL.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
hw/bus_irc.vhd
hw/irc_proc_main.vhd
hw/lx_rocon_pkg.vhd
hw/lx_rocon_top.vhd
hw/tb/Makefile
hw/xilinx_dualport_bram.vhd

index 8221655ffdf36e04e58f485de85fa641aaac5bb7..327b429ed8531c18f16d05aeefeafb13b6bd0b2d 100644 (file)
@@ -19,13 +19,13 @@ entity bus_irc is
                --
                bls_i        : in std_logic_vector(3 downto 0);
                -- Signals for IRC
-               irc_i        : in IRC_INPUT_Array_Type(7 downto 0)
+               irc_i        : in IRC_INPUT_Array_Type
        );
 end bus_irc;
 
 architecture Behavioral of bus_irc is
 
-       signal irc_o_s              : IRC_OUTPUT_Array_Type(7 downto 0);
+       signal irc_o_s              : IRC_OUTPUT_Array_Type;
        signal reset_index_event_s  : std_logic_vector(7 downto 0);
        signal reset_index_event2_s : std_logic_vector(7 downto 0);
        signal reset_ab_error_s     : std_logic_vector(7 downto 0);
index 206ef6348ac70c8908d37824cbdffafd00f83dc5..18018f249a0fabf5edb7865f4c24787696ede57a 100644 (file)
@@ -20,7 +20,7 @@ entity irc_proc_main is
                clk_i             : in std_logic;
                reset_i           : in std_logic;
                -- Signals from IRC
-               irc_i             : in IRC_COUNT_OUTPUT_Array_Type((num_irc_g-1) downto 0);
+               irc_i             : in IRC_COUNT_OUTPUT_Array_Type;
                -- Index resetting
                irc_index_reset_o : out std_logic_vector((num_irc_g-1) downto 0);
                -- BRAM access
index 85bec18e83dd2ac094e809215dad9a5abd843e9b..da7e58a98a3b659ef8937f8a19b2a7c3293abd20 100644 (file)
@@ -36,10 +36,10 @@ package lx_rocon_pkg is
        end record;
 
        -- Arrays
-       type IRC_INPUT_Array_Type         is array (natural range <>) of IRC_INPUT_Type;
-       type IRC_OUTPUT_Array_Type        is array (natural range <>) of IRC_OUTPUT_Type;
-       type IRC_COUNT_OUTPUT_Array_Type  is array (natural range <>) of IRC_COUNT_OUTPUT_Type;
-       type IRC_STATE_OUTPUT_Array_Type  is array (natural range <>) of IRC_STATE_OUTPUT_Type;
+       type IRC_INPUT_Array_Type         is array (7 downto 0) of IRC_INPUT_Type;
+       type IRC_OUTPUT_Array_Type        is array (7 downto 0) of IRC_OUTPUT_Type;
+       type IRC_COUNT_OUTPUT_Array_Type  is array (7 downto 0) of IRC_COUNT_OUTPUT_Type;
+       type IRC_STATE_OUTPUT_Array_Type  is array (7 downto 0) of IRC_STATE_OUTPUT_Type;
 
        -- IRC coprocessor MAIN
        component irc_proc_main
@@ -53,7 +53,7 @@ package lx_rocon_pkg is
                clk_i             : in std_logic;
                reset_i           : in std_logic;
                -- Signals from IRC
-               irc_i             : in IRC_COUNT_OUTPUT_Array_Type((num_irc_g-1) downto 0);
+               irc_i             : in IRC_COUNT_OUTPUT_Array_Type;
                -- Index resetting
                irc_index_reset_o : out std_logic_vector((num_irc_g-1) downto 0);
                -- BRAM access
@@ -413,7 +413,7 @@ package lx_rocon_pkg is
                --
                bls_i        : in std_logic_vector(3 downto 0);
                -- Signals for IRC
-               irc_i        : in IRC_INPUT_Array_Type(7 downto 0)
+               irc_i        : in IRC_INPUT_Array_Type
        );
        end component;
 
index 25cf26bf396a736ef7fe4c2d3d3ad922b8fa9273..97053c4da7c1036ebec03b37b758beb29aceef16 100644 (file)
@@ -4,8 +4,8 @@ use ieee.std_logic_arith.all;
 use ieee.std_logic_unsigned.all;
 use ieee.numeric_std.all;
 
-library unisim;
-use unisim.vcomponents.all;
+-- library unisim;
+-- use unisim.vcomponents.all;
 
 use work.mbl_pkg.all;
 use work.lx_rocon_pkg.all;
@@ -183,13 +183,13 @@ architecture Behavioral of lx_rocon_top is
 
        -- XST attributes
        attribute REGISTER_DUPLICATION : string;
-       attribute REGISTER_DUPLICATION of rd : signal is "NO";
+       -- attribute REGISTER_DUPLICATION of rd : signal is "NO";
        attribute REGISTER_DUPLICATION of rd_f_s : signal is "NO";
-       attribute REGISTER_DUPLICATION of bls : signal is "NO";
+       -- attribute REGISTER_DUPLICATION of bls : signal is "NO";
        attribute REGISTER_DUPLICATION of bls_f_s : signal is "NO";
-       attribute REGISTER_DUPLICATION of address : signal is "NO";
+       -- attribute REGISTER_DUPLICATION of address : signal is "NO";
        attribute REGISTER_DUPLICATION of address_f_s : signal is "NO";
-       attribute REGISTER_DUPLICATION of cs0_xc : signal is "NO";
+       -- attribute REGISTER_DUPLICATION of cs0_xc : signal is "NO";
 
 begin
 
@@ -223,59 +223,6 @@ memory_bus_measurement: bus_measurement
                data_o    => meas_out_s
        );
 
--- IRC interconnect
-memory_bus_irc: bus_irc
-       port map
-       (
-               reset_i        => reset_s,
-               --
-               clk_i          => clk_50m,
-               address_i      => tumbl_address_s(4 downto 0),
-               next_ce_i      => irc_proc_next_ce_s,
-               data_i         => tumbl_data_i_s,
-               data_o         => irc_proc_out_s,
-               bls_i          => tumbl_bls_s,
-               --
-               irc_i(0).a     => irc0_a,
-               irc_i(0).b     => irc0_b,
-               irc_i(0).index => irc0_index,
-               irc_i(0).mark  => irc0_mark,
-               --
-               irc_i(1).a     => irc1_a,
-               irc_i(1).b     => irc1_b,
-               irc_i(1).index => irc1_index,
-               irc_i(1).mark  => irc1_mark,
-               --
-               irc_i(2).a     => irc2_a,
-               irc_i(2).b     => irc2_b,
-               irc_i(2).index => irc2_index,
-               irc_i(2).mark  => irc2_mark,
-               --
-               irc_i(3).a     => irc3_a,
-               irc_i(3).b     => irc3_b,
-               irc_i(3).index => irc3_index,
-               irc_i(3).mark  => irc3_mark,
-               --
-               irc_i(4).a     => irc4_a,
-               irc_i(4).b     => irc4_b,
-               irc_i(4).index => irc4_index,
-               irc_i(4).mark  => irc4_mark,
-               --
-               irc_i(5).a     => irc5_a,
-               irc_i(5).b     => irc5_b,
-               irc_i(5).index => irc5_index,
-               irc_i(5).mark  => irc5_mark,
-               --
-               irc_i(6).a     => irc6_a,
-               irc_i(6).b     => irc6_b,
-               irc_i(6).index => irc6_index,
-               irc_i(6).mark  => irc6_mark,
-               --
-               irc_i(7).a     => irc7_a,
-               irc_i(7).b     => irc7_b,
-               irc_i(7).index => irc7_index,
-               irc_i(7).mark  => irc7_mark
-       );
 
 -- LX Master
 memory_bus_lxmaster: bus_lxmaster
index 389c9ad9aef390e58c6df2ec855e67d38f0ed24f..c9fcb8fdefd99a5a40d10040de7f2b22fa74939b 100644 (file)
@@ -13,13 +13,13 @@ lx_rocon_SRC=dff3.vhd qcounter.vhd \
        dff2.vhd bus_tumbl.vhd bus_measurement.vhd bus_lxmaster.vhd bus_irc.vhd lx_rocon_top.vhd
 lx_rocon_DIR=..
 
-MODULES=tumbl lx_util lx_rocon_tumbl
+MODULES=tumbl lx_util lx_rocon_tumbl lx_rocon lx_fncapprox
 
 SRC=$(foreach m, $(MODULES), $($(m)_SRC:%=$($(m)_DIR)/%))
 
 $(warning SRC=$(SRC))
 
-#SRC+=lx_rocon_top_tb.vhd
+SRC+=lx_rocon_top_tb.vhd
 SRC+=lx_tumbl_tb.vhd
 
 CFLAGS += -Wall
@@ -29,7 +29,7 @@ ANALYZEFLAGS+=--std=93c --ieee=synopsys -fexplicit -ggdb
 
 #SIM_FLAGS=--stop-time=1000ns #--ieee-asserts=disable
 
-all:   test-tumbl
+all:   test-rocon
 
 convert_bin2bits : convert_bin2bits.o
 
index 27ed3686fd0afa938363920b05db9cf8e37dc119..1bcae7914212abb9c70b92fc068f547bd361ac8b 100644 (file)
@@ -36,7 +36,7 @@ entity xilinx_dualport_bram is
 end xilinx_dualport_bram;
 
 architecture Behavioral of xilinx_dualport_bram is
-       type ram is array (0 to ((2**address_width) - 1)) of std_logic_vector(((byte_width*we_width)-1) downto 0);
+       type ram is array (0 to 4095) of std_logic_vector(((byte_width*we_width)-1) downto 0);
        shared variable ram_block : ram := (others => (others => '0'));
 
 begin