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pxmc: I component accumulator with long type and PXMC_SUBDIV argument protection.
[fpga/lx-cpu1/lx-rocon.git] / hw / irc_proc_inc.vhd
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_unsigned.all;
4 use ieee.numeric_std.all;
5 use work.lx_rocon_pkg.all;
6 use work.util_pkg.all;
7
8 -- Increments step in IRC coprocessor
9
10 entity irc_proc_inc is
11         generic
12         (
13                 num_irc_g  : positive := 4
14         );
15         port
16         (
17                 -- Clock
18                 clk_i   : in std_logic;
19                 reset_i : in std_logic;
20                 -- Output
21                 op_o    : out std_logic_vector(1 downto 0);
22                 axis_o  : out std_logic_vector((ceil_log2(num_irc_g)-1) downto 0)
23         );
24 end irc_proc_inc;
25
26 architecture Behavioral of irc_proc_inc is
27
28         signal num_s : std_logic_vector((axis_o'length+1) downto 0);
29
30 begin
31
32         -- higher bits are axis
33         axis_o <= num_s((num_s'length-1) downto 2);
34         -- lower bits are op
35         op_o <= num_s(1 downto 0);
36
37 inc:
38         process
39         begin
40
41                 wait until clk_i'event and clk_i = '1';
42
43                 if reset_i = '1' then
44                         num_s <= std_logic_vector(to_unsigned(4*num_irc_g - 1, num_s'length));
45                 elsif num_s = std_logic_vector(to_unsigned(4*num_irc_g - 1, num_s'length)) then
46                         num_s <= (others => '0');
47                 else
48                         num_s <= std_logic_vector(num_s + 1);
49                 end if;
50
51         end process;
52
53 end Behavioral;
54