1 #include <system_def.h>
11 #include <hal_machperiph.h>
19 #include <ul_logreg.h>
21 #include "appl_defs.h"
22 #include "appl_fpga.h"
23 #include "appl_pxmc.h"
24 #include "pxmcc_types.h"
25 #include "pxmcc_interface.h"
27 #ifdef CONFIG_OC_MTD_DRV_SYSLESS
28 #include <mtd_spi_drv.h>
31 int cmd_do_test_memusage(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
38 snprintf(str, sizeof(str), "memusage maxaddr 0x%08lx\n", (unsigned long)maxaddr);
39 cmd_io_write(cmd_io, str, strlen(str));
44 int cmd_do_test_adc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
46 printf("ADC: %ld %ld %ld %ld %ld\n", (LPC_ADC->DR[0] & 0xFFF0) >> 4,
47 (LPC_ADC->DR[1] & 0xFFF0) >> 4,
48 (LPC_ADC->DR[2] & 0xFFF0) >> 4,
49 (LPC_ADC->DR[3] & 0xFFF0) >> 4,
50 (LPC_ADC->DR[7] & 0xFFF0) >> 4);
54 #ifdef APPL_WITH_DISTORE_EEPROM_USER
55 int cmd_do_test_distore(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
57 appl_distore_user_set_check4change();
61 int cmd_do_test_diload(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
63 appl_distore_user_restore();
66 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
68 int cmd_do_test_loglevel_cb(ul_log_domain_t *domain, void *context)
71 cmd_io_t *cmd_io = (cmd_io_t *)context;
74 snprintf(s, sizeof(s) - 1, "%s (%d)\n\r", domain->name, domain->level);
75 cmd_io_puts(cmd_io, s);
79 int cmd_do_test_loglevel(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
85 if (!line || (si_skspace(&line), !*line))
87 ul_logreg_for_each_domain(cmd_do_test_loglevel_cb, cmd_io);
91 res = ul_log_domain_arg2levels(line);
94 return res >= 0 ? 0 : CMDERR_BADPAR;
97 int cmd_do_spimst_blocking(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
102 int spi_chan = (int)(intptr_t)des->info[0];
103 uint8_t *tx_buff = NULL;
104 uint8_t *rx_buff = NULL;
109 if ((opchar = cmd_opchar_check(cmd_io, des, param)) < 0)
113 return -CMDERR_OPCHAR;
116 spi_chan = *param[1] - '0';
118 spi_drv = spi_find_drv(NULL, spi_chan);
121 return -CMDERR_BADSUF;
127 if (isdigit((int)*p))
129 if (si_long(&p, &addr, 16) < 0)
130 return -CMDERR_BADPAR;
133 if (si_fndsep(&p, "({") < 0)
134 return -CMDERR_BADSEP;
136 if ((res = si_add_to_arr(&p, (void **)&tx_buff, &len, 16, 1, "})")) < 0)
137 return -CMDERR_BADPAR;
139 rx_buff = malloc(len);
144 res = spi_transfer(spi_drv, addr, len, tx_buff, rx_buff);
148 printf("SPI! %02lX ERROR\n", addr);
153 printf("SPI! %02lX ", addr);
156 for (i = 0; i < len; i++)
157 printf("%s%02X", i ? "," : "", tx_buff[i]);
161 for (i = 0; i < len; i++)
162 printf("%s%02X", i ? "," : "", rx_buff[i]);
178 int cmd_do_mtdspitest(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
181 unsigned char id_buff[3];
183 res = mtd_spi_read_jedec_id(&mtd_spi_state, id_buff, 3);
185 printf("mtd_spi_read_jedec_id returned %d\n", res);
189 printf("mtd_spi_read_jedec_id 0x%02x 0x%02x 0x%02x \n",
190 id_buff[0], id_buff[1], id_buff[2]);
192 res = mtd_spi_set_protect_mode(&mtd_spi_state, 0, 0);
194 printf("mtd_spi_set_protect_mode returned %d\n", res);
202 int sdram_access_test(void)
205 unsigned int pattern;
206 size_t ramsz = SDRAM_SIZE;
214 pattern = 0x12abcdef;
216 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
219 pattern = pattern + 0x87654321;
223 printf("SDRAM write %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
228 pattern = 0x12abcdef;
230 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
234 printf("SDRAM error modify at %p (%08x)\n", ptr, *ptr ^ pattern);
239 pattern = pattern + 0x87654321;
243 printf("SDRAM modify %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
248 pattern = 0x12abcdef;
250 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
252 if (*(ptr++) != ~pattern)
254 printf("SDRAM error read at %p (%08x)\n", ptr, *ptr ^ pattern);
258 pattern = pattern + 0x87654321;
262 printf("SDRAM read %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
269 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
275 printf("SDRAM sum %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), pattern);
277 for (blksz = 1; blksz < 256 ; blksz *= 2)
284 for (cnt = ramsz / sizeof(*ptr); cnt; cnt -= blksz)
286 ptr = (typeof(ptr))SDRAM_BASE;
288 //ptr = (typeof(ptr))cmd_do_test_memusage;
289 //ptr = (typeof(ptr))&ptr;
290 for (i = blksz; i--;)
295 printf("SDRAM sum %d blksz %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), (int)blksz, pattern);
301 int cmd_do_testsdram(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
306 #endif /*SDRAM_BASE*/
308 int cmd_do_testlxpwrrx(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
317 if (si_ulong(&ps, &mode, 0) < 0)
318 return -CMDERR_BADPAR;
321 pxmc_rocon_rx_data_hist_buff = NULL;
322 pxmc_rocon_rx_data_hist_mode = mode;
324 #ifndef PXMC_ROCON_TIMED_BY_RX_DONE
325 pxmc_rocon_rx_done_isr_setup(pxmc_rocon_rx_done_isr);
326 #endif /*PXMC_ROCON_TIMED_BY_RX_DONE*/
327 pxmc_rocon_rx_data_hist_buff_end = (void *)(FPGA_CONFIGURATION_FILE_ADDRESS +
329 ptr = (void *)FPGA_CONFIGURATION_FILE_ADDRESS;
334 pxmc_rocon_rx_data_hist_buff = (void *)ptr;
338 int cmd_do_testlxpwrstat(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
340 printf("lxpwrrx period %ld latency %ld max %ld\n",
341 (long)pxmc_rocon_rx_cycle_time, (long)pxmc_rocon_rx_irq_latency,
342 (long)pxmc_rocon_rx_irq_latency_max);
348 int cmd_do_testfncapprox(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
362 long step = 1 << (30-7-18+1 +4);
365 if (si_ulong(&ps, &fnc, 0) < 0)
366 return -CMDERR_BADPAR;
369 if (!strcmp(ps, "all")) {
371 count = 0x80000000UL / step;
376 if (si_ulong(&ps, &val, 0) < 0)
377 return -CMDERR_BADPAR;
380 for (; count--; val += step) {
384 xb = __builtin_clz(x);
390 fpga_fncapprox_base[fnc] = xl;
392 /* dummy read to provide time to function aproximator to proceed computation */
393 res = fpga_fncapprox_base[fnc];
394 res = fpga_fncapprox_base[fnc];
400 yl = (1LL << 62) / xl;
403 xf = (double)xl * M_PI / 2.0 / (1UL << 30);
404 yl = round(sin(xf) * (1UL << 16));
407 xf = (double)xl * M_PI / 2.0 / (1UL << 30);
408 yl = round(cos(xf) * (1UL << 16));
416 if ((diff > 0) && (diff > diff_max))
418 else if ((diff < 0) && (-diff > diff_max))
425 printf("fnc=%ld val=0x%08lx res=0x%08lx ref=0x%08lx diff=%ld max %ld\n",
426 fnc, val, res, (unsigned long)yl, diff, diff_max);
431 int cmd_do_testtumblefw(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
436 pxmc_state_t *mcs = pxmc_main_list.pxml_arr[0];
437 volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
439 pxmcc_axis_enable(mcs, 0);
442 if (si_long(&ps, &pwm_d, 0) < 0)
443 return -CMDERR_BADPAR;
446 if (si_ulong(&ps, &pwm_q, 0) < 0)
447 return -CMDERR_BADPAR;
451 pxmcc_axis_setup(mcs, PXMCC_MODE_BLDC);
453 pxmc_clear_flags(mcs,PXMS_ENO_m|PXMS_ENG_m|PXMS_ENR_m|PXMS_BSY_m);
454 pxmcc_axis_pwm_dq_out(mcs, pwm_d, pwm_q);
455 pxmcc_axis_enable(mcs, 1);
458 mcc_data->axis[1].inp_info = 0;
459 mcc_data->axis[1].out_info = 3;
460 mcc_data->axis[1].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
461 mcc_data->axis[1].mode = PXMCC_MODE_BLDC;
462 mcc_data->axis[1].ccflg = 1;
463 mcc_data->axis[2].inp_info = 0;
464 mcc_data->axis[2].out_info = 6;
465 mcc_data->axis[2].pwmtx_info = (15 << 0) | (16 << 8) | (18 << 16);
466 mcc_data->axis[2].mode = PXMCC_MODE_BLDC;
467 mcc_data->axis[2].ccflg = 1;
468 mcc_data->axis[3].inp_info = 0;
469 mcc_data->axis[3].out_info = 9;
470 mcc_data->axis[3].pwmtx_info = (19 << 0) | (20 << 8) | (21 << 16);
471 mcc_data->axis[3].mode = PXMCC_MODE_BLDC;
472 mcc_data->axis[3].ccflg = 1;
475 printf("spd %ld act_idle %"PRIu32" min_idle %"PRIu32" avail %lu pwm_cycle %"PRIu32"\n",
476 mcs->pxms_as, mcc_data->common.act_idle, mcc_data->common.min_idle,
477 (mcc_data->common.pwm_cycle + 6) / 6, mcc_data->common.pwm_cycle);
478 mcc_data->common.min_idle = 0x7fff;
483 #define CK_IRC_WORDS 16
484 #define CK_TX_WORDS 16
485 #define CK_RX_WORDS 16
487 #define CK_IRC_START ((uint32_t*)fpga_irc[0])
488 #define CK_TX_START (fpga_lx_master_transmitter_base+9)
489 #define CK_RX_START (fpga_lx_master_receiver_base+44)
491 typedef struct ck_state_t {
492 uint32_t ck_irc_base[CK_IRC_WORDS];
493 uint32_t ck_irc_read[CK_IRC_WORDS];
494 uint32_t ck_tx_base[CK_TX_WORDS];
495 uint32_t ck_tx_read[CK_TX_WORDS];
496 uint32_t ck_rx_base[CK_RX_WORDS];
497 uint32_t ck_rx_read[CK_RX_WORDS];
504 int cmd_do_testtumblebus(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
508 static ck_state_t *ckst = NULL;
510 ckst = malloc(sizeof(*ckst));
514 ckst->ck_irc_err = 0;
518 for (i = 0; i < CK_IRC_WORDS; i++)
519 ckst->ck_irc_base[i] = CK_IRC_START[i];
521 for (i = 0; i < CK_TX_WORDS; i++)
522 ckst->ck_tx_base[i] = CK_TX_START[i];
524 for (i = 0; i < CK_RX_WORDS; i++)
525 ckst->ck_rx_base[i] = CK_RX_START[i];
528 if (!ckst->ck_irc_err) {
529 for (i = 0; i < CK_IRC_WORDS; i++)
530 ckst->ck_irc_read[i] = CK_IRC_START[i];
531 for (i = 0; i < CK_IRC_WORDS; i++)
532 if (ckst->ck_irc_read[i] != ckst->ck_irc_base[i]) {
534 printf("irc+%x %08"PRIx32" != %08"PRIx32"\n",
535 i, ckst->ck_irc_read[i], ckst->ck_irc_base[i]);
539 if (!ckst->ck_tx_err) {
540 for (i = 0; i < CK_TX_WORDS; i++)
541 ckst->ck_tx_read[i] = CK_TX_START[i];
542 for (i = 0; i < CK_TX_WORDS; i++)
543 if (ckst->ck_tx_read[i] != ckst->ck_tx_base[i]) {
545 printf("tx+%x %08"PRIx32" != %08"PRIx32"\n",
546 i, ckst->ck_tx_read[i], ckst->ck_tx_base[i]);
550 if (!ckst->ck_rx_err) {
551 for (i = 0; i < CK_RX_WORDS; i++)
552 ckst->ck_rx_read[i] = CK_RX_START[i];
553 for (i = 0; i < CK_RX_WORDS; i++)
554 if (ckst->ck_rx_read[i] != ckst->ck_rx_base[i]) {
556 printf("rx+%x %08"PRIx32" != %08"PRIx32"\n",
557 i, ckst->ck_rx_read[i], ckst->ck_rx_base[i]);
565 int cmd_do_testcuradc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
572 volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
576 long pwm_cycle = mcc_data->common.pwm_cycle;
579 if (si_long(&ps, &pwm_chan_a, 0) < 0)
580 return -CMDERR_BADPAR;
583 if (si_ulong(&ps, &pwm_chan_b, 0) < 0)
584 return -CMDERR_BADPAR;
586 if (pwm_chan_a >= PXMCC_CURADC_CHANNELS)
587 return -CMDERR_BADPAR;
589 if (pwm_chan_b >= PXMCC_CURADC_CHANNELS)
590 return -CMDERR_BADPAR;
594 if (si_ulong(&ps, &pwm_b, 0) < 0)
595 return -CMDERR_BADPAR;
596 pxmc_for_each_mcs(i, mcs) {
597 /* PXMS_ENI_m - check if input (IRC) update is enabled */
598 if (mcs->pxms_flg & (PXMS_ENR_m | PXMS_ENO_m)) {
599 pxmc_axis_release(mcs);
603 for (i = 0; i < 16; i++) {
604 if (i == pwm_chan_a) {
605 if (pxmc_rocon_pwm_direct_wr(i, 0, 1) < 0)
607 } else if (i == pwm_chan_b) {
608 if (pxmc_rocon_pwm_direct_wr(i, pwm_b, 1) < 0)
611 pxmc_rocon_pwm_direct_wr(i, 0, 0);
616 cur_a = mcc_data->curadc[pwm_chan_a].cur_val;
617 cur_b = mcc_data->curadc[pwm_chan_b].cur_val;
618 if (pwm_b < pwm_cycle)
619 cur_b = (pwm_cycle * cur_b + pwm_cycle / 2) / (pwm_cycle - pwm_b);
621 printf("ch %2ld pwm %5ld cur %7ld\n", pwm_chan_a, 0l, cur_a);
622 printf("ch %2ld pwm %5ld cur %7ld\n", pwm_chan_b, pwm_b, cur_b);
627 int cmd_do_curadc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
630 volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
631 volatile pxmcc_curadc_data_t *curadc;
632 int subcmd = (int)des->info[0];
634 for (chan = 0; chan < PXMCC_CURADC_CHANNELS; chan++) {
635 curadc = mcc_data->curadc + chan;
638 printf("%s%ld", chan?",":"", (long)curadc->cur_val);
641 printf("%s%ld", chan?",":"", (long)curadc->siroladc_offs);
644 curadc->siroladc_offs += curadc->cur_val;
655 cmd_des_t const cmd_des_test_memusage = {0, 0,
656 "memusage", "report memory usage", cmd_do_test_memusage,
663 cmd_des_t const cmd_des_test_adc = {0, 0,
664 "testadc", "adc test", cmd_do_test_adc,
671 #ifdef APPL_WITH_DISTORE_EEPROM_USER
672 cmd_des_t const cmd_des_test_distore = {0, 0,
673 "testdistore", "test DINFO store", cmd_do_test_distore,
680 cmd_des_t const cmd_des_test_diload = {0, 0,
681 "testdiload", "test DINFO load", cmd_do_test_diload,
687 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
689 cmd_des_t const cmd_des_test_loglevel = {0, 0,
690 "loglevel", "select logging level",
691 cmd_do_test_loglevel, {}
694 cmd_des_t const cmd_des_spimst = {0, CDESM_OPCHR | CDESM_WR,
695 "SPIMST", "SPI master communication request",
696 cmd_do_spimst_blocking, {(void *)0}
699 cmd_des_t const cmd_des_spimstx = {0, CDESM_OPCHR | CDESM_WR,
700 "SPIMST#", "SPI# master communication request",
701 cmd_do_spimst_blocking, {(void *) - 1}
704 cmd_des_t const cmd_des_mtdspitest = {0, 0,
705 "mtdspitest", "test SPI connected Flash",
706 cmd_do_mtdspitest, {(void *) - 1}
710 cmd_des_t const cmd_des_testsdram = {0, 0,
711 "testsdram", "test SDRAM",
712 cmd_do_testsdram, {(void *)0}
714 #endif /*SDRAM_BASE*/
717 cmd_des_t const cmd_des_testlxpwrrx = {0, 0,
718 "testlxpwrrx", "capture data stream from lxpwr",
719 cmd_do_testlxpwrrx, {(void *)0}
722 cmd_des_t const cmd_des_testlxpwrstat = {0, 0,
723 "testlxpwrstat", "lxpwr interrupt statistic",
724 cmd_do_testlxpwrstat, {(void *)0}
727 cmd_des_t const cmd_des_testfncapprox = {0, 0,
728 "testfncapprox", "test of function approximator",
729 cmd_do_testfncapprox, {(void *)0}
732 cmd_des_t const cmd_des_testtumblefw = {0, 0,
733 "testtumblefw", "test Tumble coprocesor firmware",
734 cmd_do_testtumblefw, {(void *)0}
737 cmd_des_t const cmd_des_testtumblebus = {0, 0,
738 "testtumblebus", "test Tumble coprocesor bus",
739 cmd_do_testtumblebus, {(void *)0}
742 cmd_des_t const cmd_des_testcuradc = {0, 0,
743 "testcuradc", "test current adc channel calibration",
744 cmd_do_testcuradc, {(void *)0}
747 cmd_des_t const cmd_des_showcuradc = {0, 0,
748 "showcuradc", "print current ADC offsets",
749 cmd_do_curadc, {(void *)0}
752 cmd_des_t const cmd_des_showcuradcoffs = {0, 0,
753 "showcuradcoffs", "print current ADC offsets",
754 cmd_do_curadc, {(void *)1}
757 cmd_des_t const cmd_des_calcuradcoffs = {0, 0,
758 "calcuradcoffs", "calibrate current ADC offsets",
759 cmd_do_curadc, {(void *)2}
762 cmd_des_t const *const cmd_appl_tests[] =
764 &cmd_des_test_memusage,
766 #ifdef APPL_WITH_DISTORE_EEPROM_USER
767 &cmd_des_test_distore,
768 &cmd_des_test_diload,
769 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
770 &cmd_des_test_loglevel,
776 #endif /*SDRAM_BASE*/
777 &cmd_des_testlxpwrrx,
778 &cmd_des_testlxpwrstat,
779 &cmd_des_testfncapprox,
780 &cmd_des_testtumblefw,
781 &cmd_des_testtumblebus,
784 &cmd_des_showcuradcoffs,
785 &cmd_des_calcuradcoffs,