3 #include <system_def.h>
10 #include <usb/usb_loader.h>
11 #include <usb/usbdebug.h>
15 #include "appl_defs.h"
16 #include "usb/usb_defs.h"
17 #include "appl_fpga.h"
22 #include <lpciap_kvpb.h>
23 #include <hal_machperiph.h>
24 #endif /*CONFIG_KEYVAL*/
26 #ifdef CONFIG_OC_MTD_DRV_SYSLESS
27 #include <mtd_spi_drv.h>
31 #if __BYTE_ORDER == __BIG_ENDIAN
33 #define SWAP(x) ((((x) & 0xFF) << 8) | (((x) >> 8) & 0xFF))
34 #else /*__LITTLE_ENDIAN*/
38 #define USB_VENDOR_TARGET_TUMBL 0x03
39 #define USB_VENDOR_TARGET_32BIT 0x04
40 #define USB_VENDOR_TARGET_SPI_FLASH 0x05
42 #define USB_CMD_FPGA_CONFIGURE 0xF000
43 #define USB_CMD_FPGA_MEASURE_READ 0xF001
44 #define USB_CMD_FPGA_MEASURE_WRITE 0xF002
46 #define USB_CMD_FPGA_IRC_GET_RESET 0xF010
47 #define USB_CMD_FPGA_IRC_SET_RESET 0xF011
48 #define USB_CMD_FPGA_IRC_DUMP 0xF012
50 #define USB_CMD_FPGA_LXMASTER_GET_RESET 0xF020
51 #define USB_CMD_FPGA_LXMASTER_SET_RESET 0xF021
52 #define USB_CMD_FPGA_LXMASTER_TRANSMITTER_GET_REG 0xF022
53 #define USB_CMD_FPGA_LXMASTER_TRANSMITTER_SET_REG 0xF023
54 #define USB_CMD_FPGA_LXMASTER_TRANSMITTER_WRITE 0xF024
55 #define USB_CMD_FPGA_LXMASTER_TRANSMITTER_DUMP 0xF025
57 #define USB_CMD_FPGA_TUMBL_SET_RESET 0xF100
58 #define USB_CMD_FPGA_TUMBL_SET_HALT 0xF101
59 #define USB_CMD_FPGA_TUMBL_SET_TRACE 0xF102
60 #define USB_CMD_FPGA_TUMBL_KICK_TRACE 0xF103
61 #define USB_CMD_FPGA_TUMBL_GET_PC 0xF104
63 #define USB_CMD_FPGA_TUMBL_DUMP_IMEM 0xF200
64 #define USB_CMD_FPGA_TUMBL_DUMP_DMEM 0xF201
66 #define USB_CMD_FPGA_RESET 0xFFFF
68 usb_device_t usb_device;
69 usb_ep_t eps[NUM_ENDPOINTS];
71 #define CDC0_EPIDX_NOTIFY 0
72 #define CDC0_EPIDX_RXD 1
73 #define CDC0_EPIDX_TXD 2
74 #define CDC0_MASK_EP_NOTIFY (1<<CDC0_EPIDX_NOTIFY)
75 #define CDC0_MASK_EP_RXD (1<<CDC0_EPIDX_RXD)
76 #define CDC0_MASK_EP_TXD (1<<CDC0_EPIDX_TXD)
78 unsigned char cdc0_ep_tx_buff[CDC0_MAX_PACKET] __attribute__ ((aligned (8)));
79 unsigned char cdc0_ep_rx_buff[CDC0_MAX_PACKET] __attribute__ ((aligned (8)));
80 unsigned char ep0_buffer[USB_MAX_PACKET0] __attribute__ ((aligned (8)));
81 int cdc0_tx_index = 0, cdc0_tx_ready = 1;
82 int cdc0_tx_flush_required;
83 int cdc0_rx_index = 0, cdc0_rx_chars = 0;
85 uint16_t cdc0_serial_state = 0; /* USBCDC_SERIAL_STATE_xxx */
86 acm_desc_t usbcdc_acm_description;
90 #ifdef CONFIG_OC_CMDPROC
92 cmd_io_t cmd_io_usbcon_dev;
94 #define ED_LINE_CHARS 512
96 char ed_line_chars_usbcon_in[ED_LINE_CHARS + 1];
97 char ed_line_chars_usbcon_out[ED_LINE_CHARS + 1];
99 ed_line_buf_t ed_line_buf_usbcon_in =
105 sizeof(ed_line_chars_usbcon_in),
109 ed_line_chars_usbcon_in
112 ed_line_buf_t ed_line_buf_usbcon_out =
118 sizeof(ed_line_chars_usbcon_out),
122 ed_line_chars_usbcon_out
125 cmd_io_t cmd_io_usbcon =
140 &ed_line_buf_usbcon_in,
142 &ed_line_buf_usbcon_out,
151 static int usb_flash_pkt_wr(struct usb_ep_t *ep, int len, int code)
153 unsigned char *ptr = ep->ptr - len;
156 lpcisp_kvpb_copy(NULL, (void *)ep->user_data, ptr, len);
157 #endif /*CONFIG_KEYVAL*/
159 ep->user_data += len;
160 ep->ptr = ep0_buffer;
161 return USB_COMPLETE_OK;
164 static int usb_tumbl_pkt_wr(struct usb_ep_t *ep, int len, int code)
166 unsigned char *ptr = ep->ptr - len;
168 fpga_tumbl_write(ep->user_data, ptr, len);
170 ep->user_data += len;
171 ep->ptr = ep0_buffer;
172 return USB_COMPLETE_OK;
175 static int usb_32bit_pkt_wr(struct usb_ep_t *ep, int len, int code)
177 uint32_t *srcptr = (uint32_t *)(ep->ptr - len);
178 volatile uint32_t *dstptr = (uint32_t *)ep->user_data;
181 for (pos = 0; len - pos >= 4; pos += 4, dstptr++, srcptr++)
184 ep->user_data += len;
185 ep->ptr = ep0_buffer;
186 return USB_COMPLETE_OK;
189 int usb_32bit_pkt_rd(struct usb_ep_t *ep, int len, int code)
191 volatile uint32_t *srcptr;
195 ep->ptr = ep0_buffer;
196 dstptr = (uint32_t *)ep->ptr;
197 srcptr = (uint32_t *)ep->user_data;
199 for (pos = 0; len - pos >= 4; pos += 4, dstptr++, srcptr++)
202 ep->user_data += len;
203 return USB_COMPLETE_OK;
206 static int usb_flash_erase(unsigned addr, unsigned len)
209 lpcisp_erase((void *)addr, len);
210 #endif /*CONFIG_KEYVAL*/
214 static int usb_spi_flash_pkt_wr(struct usb_ep_t *ep, int len, int code)
216 unsigned char *ptr = ep->ptr - len;
218 #ifdef CONFIG_OC_MTD_DRV_SYSLESS
219 mtd_spi_write(&mtd_spi_state, ptr, len, ep->user_data, 0);
220 #endif /*CONFIG_KEYVAL*/
222 ep->user_data += len;
223 ep->ptr = ep0_buffer;
224 return USB_COMPLETE_OK;
227 int usb_spi_flash_pkt_rd(struct usb_ep_t *ep, int len, int code)
229 ep->ptr = ep0_buffer;
230 #ifdef CONFIG_OC_MTD_DRV_SYSLESS
231 mtd_spi_read(&mtd_spi_state, ep->ptr, len, ep->user_data, 0);
232 #endif /*CONFIG_KEYVAL*/
234 ep->user_data += len;
235 return USB_COMPLETE_OK;
238 int usb_spi_flash_mass_erase(int mode)
240 #ifdef CONFIG_OC_MTD_DRV_SYSLESS
241 mtd_spi_set_protect_mode(&mtd_spi_state, 0, 0);
242 mtd_spi_chip_erase(&mtd_spi_state, mode, 0);
243 #endif /*CONFIG_KEYVAL*/
247 static void usb_goto(unsigned address)
250 lpc_watchdog_init(1, 10);
256 #endif /*CONFIG_KEYVAL*/
260 uint16_t vendor_call_ret = 0xFFFF;
262 uint16_t appl_usb_vendor_call(uint16_t command, uint16_t argument)
268 case USB_CMD_FPGA_CONFIGURE:
269 return fpga_configure();
271 case USB_CMD_FPGA_MEASURE_READ:
272 return fpga_measure_bus_read();
274 case USB_CMD_FPGA_MEASURE_WRITE:
275 return fpga_measure_bus_write();
277 case USB_CMD_FPGA_IRC_GET_RESET:
278 printf("IRC RESET: 0x%02x\n", *fpga_irc_reset);
281 case USB_CMD_FPGA_IRC_SET_RESET:
282 /* When starting, zero out counters */
283 *fpga_irc_reset = argument & 0x0001;
286 case USB_CMD_FPGA_IRC_DUMP:
287 for (i = 0; i < 8; i++)
288 printf("IRC%d: count = %d, count index = %d, mark = %d, ab_error = %d, index_event = %d, index = %d\n", i+1,
289 (unsigned int) fpga_irc[i]->count, (unsigned int) fpga_irc[i]->count_index, ((*(fpga_irc_state[i])) & 0x01) != 0,
290 ((*(fpga_irc_state[i])) & 0x02) != 0, ((*(fpga_irc_state[i])) & 0x04) != 0, ((*(fpga_irc_state[i])) & 0x08) != 0);
293 case USB_CMD_FPGA_LXMASTER_GET_RESET:
294 printf("LXMASTER RESET: 0x%02"PRIx32"\n", *fpga_lx_master_reset);
297 case USB_CMD_FPGA_LXMASTER_SET_RESET:
298 /* When starting, zero out counters */
299 *fpga_lx_master_reset = argument & 0x0001;
302 case USB_CMD_FPGA_LXMASTER_TRANSMITTER_GET_REG:
303 printf("LXMASTER TRANSMITTER REG: 0x%02"PRIx32"\n", *fpga_lx_master_transmitter_reg);
306 case USB_CMD_FPGA_LXMASTER_TRANSMITTER_SET_REG:
307 /* When starting, zero out counters */
308 *fpga_lx_master_transmitter_reg = argument & 0x0001;
311 case USB_CMD_FPGA_LXMASTER_TRANSMITTER_WRITE:
312 for (i = 0; i < (argument / 4); i++)
313 fpga_lx_master_transmitter_base[i] = fpga_lx_master_conf[i];
316 case USB_CMD_FPGA_LXMASTER_TRANSMITTER_DUMP:
317 printf("LX MASTER TRANSMITTER MEM:\n");
318 for (i = 0; i < 16; i++)
320 for (j = 0; j < 16; j++)
321 printf("%04X ", (unsigned int) (fpga_lx_master_transmitter_base[i*16 + j] & 0xFFFF));
327 case USB_CMD_FPGA_TUMBL_SET_RESET:
328 return fpga_tumbl_set_reset(argument);
330 case USB_CMD_FPGA_TUMBL_SET_HALT:
331 return fpga_tumbl_set_halt(argument);
333 case USB_CMD_FPGA_TUMBL_SET_TRACE:
334 return fpga_tumbl_set_trace(argument);
336 case USB_CMD_FPGA_TUMBL_KICK_TRACE:
337 return fpga_tumbl_kick_trace();
339 case USB_CMD_FPGA_TUMBL_GET_PC:
340 printf("Tubml PC: 0x%08X\n", (unsigned int) *fpga_tumbl_pc);
343 case USB_CMD_FPGA_TUMBL_DUMP_IMEM:
344 printf("TUMBL IMEM:\n");
345 for (i = 0; i < 64; i++)
347 for (j = 0; j < 8; j++)
348 printf("%08X ", (unsigned int) fpga_tumbl_imem[i*8 + j]);
354 case USB_CMD_FPGA_TUMBL_DUMP_DMEM:
355 printf("TUMBL DMEM:\n");
356 for (i = 0; i < 128; i++)
358 for (j = 0; j < 8; j++)
359 printf("%08X ", (unsigned int) fpga_tumbl_dmem[i*8 + j]);
365 case USB_CMD_FPGA_RESET:
366 hal_gpio_direction_output(XC_INIT_PIN, 0);
368 for (i = 0; i < 128; i++)
371 hal_gpio_direction_output(XC_INIT_PIN, 1);
378 int appl_usb_vendor(usb_device_t *udev)
382 USB_DEVICE_REQUEST *dreq;
385 dreq = &udev->request;
389 if (dreq->bRequest != (USB_VENDOR_GET_SET_MEMORY |
390 USB_DATA_DIR_FROM_HOST | USB_VENDOR_TARGET_FLASH))
391 lpcisp_kvpb_flush(NULL);
393 #endif /*CONFIG_KEYVAL*/
395 switch (dreq->bRequest & USB_VENDOR_MASK)
397 case USB_VENDOR_GET_CAPABILITIES:
398 ep0_buffer[0] = 0xAA; // test
399 usb_send_control_data(udev, ep0_buffer, 1);
402 case USB_VENDOR_RESET_DEVICE:
403 usb_send_control_data(udev, NULL, 0);
405 lpc_watchdog_init(1, 10);
411 #endif /*CONFIG_KEYVAL*/
414 case USB_VENDOR_GOTO:
415 usb_send_control_data(udev, NULL, 0);
416 usb_goto(dreq->wValue);
419 case USB_VENDOR_ERASE_MEMORY:
420 usb_send_control_data(udev, NULL, 0);
421 usb_flash_erase(dreq->wValue, dreq->wIndex);
424 case USB_VENDOR_ERASE_1KB_MEMORY: /* erase memory for 1 KB */
425 usb_send_control_data(udev, NULL, 0);
426 usb_flash_erase((uint32_t)dreq->wValue << 10, dreq->wIndex << 10);
429 case USB_VENDOR_MASS_ERASE:
430 usb_send_control_data(udev, NULL, 0);
431 if (dreq->wIndex == 5)
432 usb_spi_flash_mass_erase(dreq->wValue);
435 case USB_VENDOR_CALL:
436 vendor_call_ret = SWAP(appl_usb_vendor_call(dreq->wIndex, dreq->wValue));
437 usb_send_control_data(udev, (unsigned char *) &vendor_call_ret, sizeof(uint16_t));
440 case USB_VENDOR_GET_SET_MEMORY:
441 addr = (dreq->wValue & 0xffff) | (((unsigned long)dreq->wIndex & 0xffff) << 16);
444 if ((dreq->bmRequestType & USB_DATA_DIR_MASK) == USB_DATA_DIR_FROM_HOST)
446 switch (dreq->bRequest & USB_VENDOR_TARGET_MASK)
448 case USB_VENDOR_TARGET_RAM:
449 udev->ep0.ptr = (void *)addr;
452 case USB_VENDOR_TARGET_FLASH:
453 udev->ep0.next_pkt_fnc = usb_flash_pkt_wr;
454 udev->ep0.user_data = addr;
455 udev->ep0.ptr = ep0_buffer;
458 case USB_VENDOR_TARGET_TUMBL:
459 udev->ep0.next_pkt_fnc = usb_tumbl_pkt_wr;
460 udev->ep0.user_data = addr;
461 udev->ep0.ptr = ep0_buffer;
464 case USB_VENDOR_TARGET_32BIT:
465 udev->ep0.next_pkt_fnc = usb_32bit_pkt_wr;
466 udev->ep0.user_data = addr;
467 udev->ep0.ptr = ep0_buffer;
470 case USB_VENDOR_TARGET_SPI_FLASH:
471 udev->ep0.next_pkt_fnc = usb_spi_flash_pkt_wr;
472 udev->ep0.user_data = addr;
473 udev->ep0.ptr = ep0_buffer;
481 usb_set_control_endfnc(udev, usb_ack_setup);
483 usb_send_control_data(udev, NULL, 0);
489 switch (dreq->bRequest & USB_VENDOR_TARGET_MASK)
491 case USB_VENDOR_TARGET_RAM:
492 usb_send_control_data(udev, (void *)addr, len);
495 case USB_VENDOR_TARGET_32BIT:
496 udev->ep0.next_pkt_fnc = usb_32bit_pkt_rd;
497 udev->ep0.user_data=addr;
498 usb_send_control_data( udev, ep0_buffer, len);
501 case USB_VENDOR_TARGET_SPI_FLASH:
502 udev->ep0.next_pkt_fnc = usb_spi_flash_pkt_rd;
503 udev->ep0.user_data=addr;
504 usb_send_control_data( udev, ep0_buffer, len);
520 int usb_app_fill_serial_number(uint32_t ul_sn)
522 char *p = usb_devdes_serial_number;
523 int len_max = sizeof(usb_devdes_serial_number);
526 while ((len_max -= 2) >= 2)
529 c = ((ul_sn >> (32 - 4)) & 0xf) + '0';
542 int usb_app_epnum2event_mask(int epnum)
546 /* LPC17xx EP1RX 0x04, EP1TX 0x08, EP2RX 0x10, EP2TX 0x20 */
548 evbit = (epnum & ~USB_ENDPOINT_DIRECTION_MASK) * 2;
549 if (epnum & USB_ENDPOINT_DIRECTION_MASK)
557 int usb_app_init(void)
559 memset(&usb_device, 0, sizeof(usb_device));
561 eps[CDC0_EPIDX_NOTIFY].max_packet_size = USB_MAX_PACKET;
562 eps[CDC0_EPIDX_RXD].max_packet_size = CDC0_MAX_PACKET;
563 eps[CDC0_EPIDX_TXD].max_packet_size = CDC0_MAX_PACKET;
564 eps[CDC0_EPIDX_NOTIFY].epnum = CDC0_EP_NOTIFY;
565 eps[CDC0_EPIDX_RXD].epnum = CDC0_EP_RXD;
566 eps[CDC0_EPIDX_TXD].epnum = CDC0_EP_TXD;
567 eps[CDC0_EPIDX_NOTIFY].event_mask = usb_app_epnum2event_mask(CDC0_EP_NOTIFY); /* 0x08; */
568 eps[CDC0_EPIDX_RXD].event_mask = usb_app_epnum2event_mask(CDC0_EP_RXD); /* 0x10; */
569 eps[CDC0_EPIDX_TXD].event_mask = usb_app_epnum2event_mask(CDC0_EP_TXD); /* 0x20; */
570 eps[CDC0_EPIDX_NOTIFY].udev = &usb_device;
571 eps[CDC0_EPIDX_RXD].udev = &usb_device;
572 eps[CDC0_EPIDX_TXD].udev = &usb_device;
575 usb_device.devdes_table = &usb_devdes_table;
576 usb_device.init = usb_lpc_init;
577 usb_debug_set_level(DEBUG_LEVEL_NONE);
578 usb_device.cntep = NUM_ENDPOINTS;
580 usb_device.vendor_fnc = appl_usb_vendor;
581 usb_device.class_fnc = usbcdc_acm_class_response;
583 usb_init(&usb_device);
584 usb_connect(&usb_device);
589 int cdc0_txd_check_ep(void)
591 if (usb_device.ep_events & CDC0_MASK_EP_TXD)
593 usb_device.ep_events &= ~CDC0_MASK_EP_TXD;
594 //TODO: Use some field in the structure, probably flags
598 /* Respond if there is something to send and RX is ready */
599 if (cdc0_tx_ready && ((cdc0_tx_index != 0) || cdc0_tx_flush_required))
601 usb_udev_write_endpoint(&eps[CDC0_EPIDX_TXD], cdc0_ep_tx_buff, cdc0_tx_index);
602 cdc0_tx_flush_required = (cdc0_tx_index == CDC0_MAX_PACKET);
605 hal_gpio_set_value(LED2_PIN, 0);
612 int usb_app_poll(void)
614 int active = usb_active;
617 usb_check_events(&usb_device);
618 usb_control_response(&usb_device);
620 /* Check RXD/OUT endpoint */
621 if (usb_device.ep_events & CDC0_MASK_EP_NOTIFY)
623 usb_udev_read_endpoint(&eps[CDC0_EPIDX_NOTIFY], &cdc0_serial_state, 2);
624 usb_device.ep_events &= ~CDC0_MASK_EP_NOTIFY;
628 /* Check RXD/OUT endpoint */
629 if (usb_device.ep_events & CDC0_MASK_EP_RXD)
631 cdc0_rx_chars = usb_udev_read_endpoint(&eps[CDC0_EPIDX_RXD], cdc0_ep_rx_buff, CDC0_MAX_PACKET);
633 usb_device.ep_events &= ~CDC0_MASK_EP_RXD;
634 hal_gpio_set_value(LED2_PIN, 0);
638 /* Check RX endpoint */
639 usb_active |= cdc0_txd_check_ep();
644 int usb_app_stop(void)
646 usb_disconnect(&usb_device);
650 #ifdef CONFIG_OC_CMDPROC
652 int cmd_io_getc_usbcon(struct cmd_io *cmd_io)
654 if (cdc0_rx_index >= cdc0_rx_chars)
657 return cdc0_ep_rx_buff[cdc0_rx_index++];
660 int cmd_io_putc_usbcon(struct cmd_io *cmd_io, int ch)
662 if (cdc0_tx_index >= CDC0_MAX_PACKET)
664 /* Check EP1 status and return -1 if unavailable */
665 usb_check_events(&usb_device);
668 /* Check again if it wasn't emptied */
669 if (cdc0_tx_index >= CDC0_MAX_PACKET)
673 cdc0_ep_tx_buff[cdc0_tx_index++] = (unsigned char)ch;
677 cmd_io_t cmd_io_usbcon_dev =
679 .putc = cmd_io_putc_usbcon,
680 .getc = cmd_io_getc_usbcon,
681 .write = cmd_io_write_bychar,
682 .read = cmd_io_read_bychar,