1 /*******************************************************************
2 Motion and Robotic System (MARS) aplication components.
4 appl_pxmc.c - position controller subsystem core generic
5 and LP_MPW1 hardware specific support
7 Copyright (C) 2001-2013 by Pavel Pisa - originator
9 (C) 2001-2013 by PiKRON Ltd. - originator
12 This file can be used and copied according to next
14 - GPL - GNU Public License
15 - other license provided by project originators
17 *******************************************************************/
20 #include <system_def.h>
22 #include <pxmc_lpc_qei.h>
23 #include <pxmc_internal.h>
24 #include <pxmc_inp_common.h>
25 #include <pxmc_gen_info.h>
27 #include <hal_machperiph.h>
30 #include "appl_defs.h"
31 #include "appl_fpga.h"
33 #define PXML_MAIN_CNT 8
35 #define PXMC_WITH_PT_ZIC 1
36 #define PXMC_PT_ZIC_MASK 0x8000
38 #define LPCPWM1_FREQ 20000
40 #define HAL_ERR_SENSITIVITY 20
41 #define HAL_ERR_MAX_COUNT 5
43 unsigned pxmc_lpcpwm1_magnitude;
45 long pxmc_irc_offset[PXML_MAIN_CNT];
48 pxmc_inp_rocon_inp(struct pxmc_state *mcs)
50 int chan=mcs->pxms_inp_info;
54 /* read position from hardware */
55 irc = fpga_irc[chan]->count;
56 irc += pxmc_irc_offset[chan];
57 pos = irc << PXMC_SUBDIV(mcs);
58 mcs->pxms_as = pos - mcs->pxms_ap;
61 /* Running of the motor commutator */
62 if (mcs->pxms_flg & PXMS_PTI_m)
63 pxmc_irc_16bit_commindx(mcs, irc);
69 pxmc_inp_rocon_ap2hw(struct pxmc_state *mcs)
71 int chan=mcs->pxms_inp_info;
75 irc = fpga_irc[chan]->count;
76 pos_diff = mcs->pxms_ap - (irc << PXMC_SUBDIV(mcs));
77 pxmc_irc_offset[chan] = pos_diff >> PXMC_SUBDIV(mcs);
82 pxmc_rocon_bdc_hal_rd(pxmc_state_t *mcs)
86 /* return 3 bits corresponding to the HAL senzor input */
91 const unsigned char pxmc_lpc_bdc_hal_pos_table[8] =
103 const unsigned char pxmc_lpc_bdc_hal_pos_table[8] =
117 * pxmc_rocon_pwm3ph_wr - Output of the 3-phase PWM to the hardware
118 * @mcs: Motion controller state information
120 /*static*/ inline void
121 pxmc_rocon_pwm3ph_wr(pxmc_state_t *mcs, short pwm1, short pwm2, short pwm3)
123 unsigned long out_info = mcs->pxms_out_info;
129 pxmc_rocon_process_hal_error(struct pxmc_state *mcs)
131 if (mcs->pxms_halerc >= HAL_ERR_SENSITIVITY * HAL_ERR_MAX_COUNT)
133 pxmc_set_errno(mcs, PXMS_E_HAL);
138 mcs->pxms_halerc += HAL_ERR_SENSITIVITY;
142 * pxmc_rocon_pwm_out - Phase output for brush-less 3-phase motor
143 * @mcs: Motion controller state information
146 pxmc_rocon_pwm_out(pxmc_state_t *mcs)
148 unsigned char hal_pos;
156 if (!(mcs->pxms_flg & PXMS_PTI_m) || !(mcs->pxms_flg & PXMS_PHA_m) ||
157 (mcs->pxms_flg & PXMS_PRA_m))
160 short ptirc = mcs->pxms_ptirc;
161 short divisor = mcs->pxms_ptper * 6;
163 hal_pos = pxmc_lpc_bdc_hal_pos_table[pxmc_rocon_bdc_hal_rd(mcs)];
168 pxmc_rocon_process_hal_error(mcs);
172 if (mcs->pxms_halerc)
175 ptindx = (hal_pos * ptirc + divisor / 2) / divisor;
177 if (!(mcs->pxms_flg & PXMS_PTI_m) || (mcs->pxms_flg & PXMS_PRA_m))
179 if (((hal_pos != mcs->pxms_hal) && (mcs->pxms_hal != 0x40)) && 1)
181 short ptindx_prev = (mcs->pxms_hal * ptirc + divisor / 2) / divisor;;
183 if ((ptindx > ptindx_prev + ptirc / 2) ||
184 (ptindx_prev > ptindx + ptirc / 2))
186 ptindx = (ptindx_prev + ptindx - ptirc) / 2;
193 ptindx = (ptindx_prev + ptindx) / 2;
196 mcs->pxms_ptindx = ptindx;
198 mcs->pxms_ptofs = (mcs->pxms_ap >> PXMC_SUBDIV(mcs)) + mcs->pxms_ptshift - ptindx;
200 pxmc_set_flag(mcs, PXMS_PTI_b);
201 pxmc_clear_flag(mcs, PXMS_PRA_b);
203 /* if phase table position to mask is know do fine phase table alignment */
204 if (mcs->pxms_cfg & PXMS_CFG_I2PT_m)
205 lpc_qei_setup_index_catch(&lpc_qei_state);
210 if (!(mcs->pxms_flg & PXMS_PTI_m))
211 mcs->pxms_ptindx = ptindx;
215 mcs->pxms_hal = hal_pos;
220 /*wind_current[0]=(ADC->ADDR0 & 0xFFF0)>>4;*/
221 /* FIXME - check winding current against limit */
222 /* pxmc_set_errno(mcs, PXMS_E_WINDCURRENT); */
229 indx = mcs->pxms_ptindx;
231 /* tuning of magnetic field/voltage advance angle */
232 indx += (mcs->pxms_s1 * mcs->pxms_as) >> (PXMC_SUBDIV(mcs) + 8);
237 /* Generating direction of stator mag. field for backward torque */
240 if ((indx -= mcs->pxms_ptvang) < 0)
241 indx += mcs->pxms_ptirc;
245 /* Generating direction of stator mag. field for forward torque */
246 if ((indx += mcs->pxms_ptvang) >= mcs->pxms_ptirc)
247 indx -= mcs->pxms_ptirc;
250 if (mcs->pxms_ptscale_mult)
251 indx = ((unsigned long)indx * mcs->pxms_ptscale_mult) >> mcs->pxms_ptscale_shift;
253 pwm1 = mcs->pxms_ptptr1[indx];
254 pwm2 = mcs->pxms_ptptr2[indx];
255 pwm3 = mcs->pxms_ptptr3[indx];
257 #ifdef PXMC_WITH_PT_ZIC
259 if (labs(mcs->pxms_as) > (10 << PXMC_SUBDIV(mcs)))
261 if (pwm1 & PXMC_PT_ZIC_MASK)
263 /*hal_gpio_set_value(PWM2_EN_PIN,0);*/
267 /*hal_gpio_set_value(PWM2_EN_PIN,1);*/
270 if (pwm2 & PXMC_PT_ZIC_MASK)
272 /*hal_gpio_set_value(PWM4_EN_PIN,0);*/
276 /*hal_gpio_set_value(PWM4_EN_PIN,1);*/
279 if (pwm3 & PXMC_PT_ZIC_MASK)
281 /*hal_gpio_set_value(PWM6_EN_PIN,0);*/
285 /*hal_gpio_set_value(PWM6_EN_PIN,1);*/
290 /*hal_gpio_set_value(PWM2_EN_PIN,1);*/
291 /*hal_gpio_set_value(PWM4_EN_PIN,1);*/
292 /*hal_gpio_set_value(PWM6_EN_PIN,1);*/
295 pwm1 &= ~PXMC_PT_ZIC_MASK;
296 pwm2 &= ~PXMC_PT_ZIC_MASK;
297 pwm3 &= ~PXMC_PT_ZIC_MASK;
298 #endif /*PXMC_WITH_PT_ZIC*/
300 /* Default phase-table amplitude is 0x7fff, ene max is 0x7fff */
301 /* Initialized CTM4 PWM period is 0x200 => divide by value about 2097024 */
303 unsigned long pwm_dc = pxmc_lpcpwm1_magnitude * (unsigned long)ene;
304 pwm1 = ((unsigned long long)pwm1 * pwm_dc) >> (15 + 15);
305 pwm2 = ((unsigned long long)pwm2 * pwm_dc) >> (15 + 15);
306 pwm3 = ((unsigned long long)pwm3 * pwm_dc) >> (15 + 15);
308 pxmc_rocon_pwm3ph_wr(mcs, pwm1, pwm2, pwm3);
312 /*pxmc_lpc_wind_current_over_cnt=0;*/
313 pxmc_rocon_pwm3ph_wr(mcs, 0, 0, 0);
314 #ifdef PXMC_WITH_PT_ZIC
315 /*hal_gpio_set_value(PWM2_EN_PIN,1);*/
316 /*hal_gpio_set_value(PWM4_EN_PIN,1);*/
317 /*hal_gpio_set_value(PWM6_EN_PIN,1);*/
318 #endif /*PXMC_WITH_PT_ZIC*/
324 uint32_t pxmc_rocon_pwm_dummy_reg;
326 static inline volatile uint32_t *
327 pxmc_rocon_pwm_chan2reg(unsigned chan)
329 volatile uint32_t *pwm_reg;
332 return &pxmc_rocon_pwm_dummy_reg;
334 pwm_reg = fpga_lx_master_transmitter_base;
335 pwm_reg += 1 + (chan >> 8) + chan;
341 pxmc_rocon_pwm_dc_out(pxmc_state_t *mcs)
343 volatile uint32_t *pwm_reg_a, *pwm_reg_b;
344 int chan = mcs->pxms_out_info;
345 int ene = mcs->pxms_ene;
350 pwm_reg_a = pxmc_rocon_pwm_chan2reg(chan + 0);
351 pwm_reg_b = pxmc_rocon_pwm_chan2reg(chan + 1);
357 ene = (ene * (2500 + 5)) >> 15;
359 *pwm_reg_b = ene | 0x4000;
363 ene = (ene * (2500 + 5)) >> 15;
365 *pwm_reg_a = ene | 0x4000;
371 /* PWM outputs placed on (PWM1), PWM2, PWM4, PWM6 */
373 pxmc_rocon_pwm_master_init(void)
377 *fpga_lx_master_reset = 1;
378 *fpga_lx_master_transmitter_reg = 0;
380 for (i = 0; i < 16 + 3; i ++)
381 fpga_lx_master_transmitter_base[0] = 0;
383 fpga_lx_master_transmitter_base[0] = 8;
385 *fpga_lx_master_reset = 0;
391 pxmc_fpga_is_mark(pxmc_state_t *mcs)
393 int chan=mcs->pxms_inp_info;
395 return *fpga_irc_state[chan] & 1;
398 int pxmc_fpga_hh_gd10(pxmc_state_t *mcs);
399 int pxmc_fpga_hh_gd20(pxmc_state_t *mcs);
402 pxmc_fpga_hh_gi(pxmc_state_t *mcs)
405 pxmc_set_flag(mcs,PXMS_BSY_b);
408 spd >>= mcs->pxms_cfg&PXMS_CFG_HSPD_m;
410 if(mcs->pxms_cfg & PXMS_CFG_HDIR_m)
412 mcs->pxms_gen_hsp = spd;
413 mcs->pxms_do_gen = pxmc_fpga_hh_gd10;
414 return pxmc_fpga_hh_gd10(mcs);
418 pxmc_fpga_hh_gd10(pxmc_state_t *mcs)
421 if(mcs->pxms_flg & PXMS_ERR_m)
422 return pxmc_spdnext_gend(mcs);
424 pxmc_spd_gacc(&(mcs->pxms_rs), mcs->pxms_gen_hsp, mcs->pxms_ma);
425 mcs->pxms_rp += mcs->pxms_rs;
427 if (!pxmc_fpga_is_mark(mcs)){
428 spd=mcs->pxms_gen_hsp;
436 mcs->pxms_gen_hsp = spd;
437 mcs->pxms_do_gen = pxmc_fpga_hh_gd20;
444 pxmc_fpga_hh_gd20(pxmc_state_t *mcs)
446 if (mcs->pxms_flg & PXMS_ERR_m)
447 return pxmc_spdnext_gend(mcs);
449 pxmc_spd_gacc(&(mcs->pxms_rs), mcs->pxms_gen_hsp, mcs->pxms_ma);
450 mcs->pxms_rp += mcs->pxms_rs;
452 if (pxmc_fpga_is_mark(mcs)){
453 /* pxmc_axis_set_pos(mcs, 0); */
454 if (mcs->pxms_do_ap2hw != NULL) {
455 mcs->pxms_rp = mcs->pxms_ap = 0;
456 mcs->pxms_do_ap2hw(mcs);
457 mcs->pxms_rp = mcs->pxms_ap = 0;
459 mcs->pxms_do_gen = pxmc_stop_gi;
465 pxmc_call_t *pxmc_get_hh_gi_4axis(pxmc_state_t *mcs)
467 return pxmc_fpga_hh_gi;
479 pxmc_rocon_pwm_dc_out,
483 pxmc_inp_rocon_ap2hw,
484 pxms_ap: 0, pxms_as: 0,
485 pxms_rp: 55 * 256, pxms_rs: 0, pxms_subdiv: 8,
486 pxms_md: 800 << 8, pxms_ms: 1000, pxms_ma: 10,
489 pxms_ene: 0, pxms_erc: 0,
490 pxms_p: 80, pxms_i: 30, pxms_d: 200, pxms_s1: 200, pxms_s2: 0,
491 pxms_me: 0x7e00/*0x7fff*/,
493 PXMS_CFG_SMTH_m | PXMS_CFG_MD2E_m | PXMS_CFG_HLS_m | PXMS_CFG_I2PT_m * 0 |
498 /*pxms_ptamp: 0x7fff,*/
512 pxmc_rocon_pwm_dc_out,
516 pxmc_inp_rocon_ap2hw,
517 pxms_ap: 0, pxms_as: 0,
518 pxms_rp: 55 * 256, pxms_rs: 0, pxms_subdiv: 8,
519 pxms_md: 800 << 8, pxms_ms: 1000, pxms_ma: 10,
522 pxms_ene: 0, pxms_erc: 0,
523 pxms_p: 80, pxms_i: 30, pxms_d: 200, pxms_s1: 200, pxms_s2: 0,
524 pxms_me: 0x7e00/*0x7fff*/,
526 PXMS_CFG_SMTH_m | PXMS_CFG_MD2E_m | PXMS_CFG_HLS_m | PXMS_CFG_I2PT_m * 0 |
531 /*pxms_ptamp: 0x7fff,*/
545 pxmc_rocon_pwm_dc_out,
549 pxmc_inp_rocon_ap2hw,
550 pxms_ap: 0, pxms_as: 0,
551 pxms_rp: 55 * 256, pxms_rs: 0, pxms_subdiv: 8,
552 pxms_md: 800 << 8, pxms_ms: 1000, pxms_ma: 10,
555 pxms_ene: 0, pxms_erc: 0,
556 pxms_p: 80, pxms_i: 30, pxms_d: 200, pxms_s1: 200, pxms_s2: 0,
557 pxms_me: 0x7e00/*0x7fff*/,
559 PXMS_CFG_SMTH_m | PXMS_CFG_MD2E_m | PXMS_CFG_HLS_m | PXMS_CFG_I2PT_m * 0 |
564 /*pxms_ptamp: 0x7fff,*/
578 pxmc_rocon_pwm_dc_out,
582 pxmc_inp_rocon_ap2hw,
583 pxms_ap: 0, pxms_as: 0,
584 pxms_rp: 55 * 256, pxms_rs: 0, pxms_subdiv: 8,
585 pxms_md: 800 << 8, pxms_ms: 1000, pxms_ma: 10,
588 pxms_ene: 0, pxms_erc: 0,
589 pxms_p: 80, pxms_i: 30, pxms_d: 200, pxms_s1: 200, pxms_s2: 0,
590 pxms_me: 0x7e00/*0x7fff*/,
592 PXMS_CFG_SMTH_m | PXMS_CFG_MD2E_m | PXMS_CFG_HLS_m | PXMS_CFG_I2PT_m * 0 |
597 /*pxms_ptamp: 0x7fff,*/
611 pxmc_rocon_pwm_dc_out,
615 pxmc_inp_rocon_ap2hw,
616 pxms_ap: 0, pxms_as: 0,
617 pxms_rp: 55 * 256, pxms_rs: 0, pxms_subdiv: 8,
618 pxms_md: 800 << 8, pxms_ms: 1000, pxms_ma: 10,
621 pxms_ene: 0, pxms_erc: 0,
622 pxms_p: 80, pxms_i: 30, pxms_d: 200, pxms_s1: 200, pxms_s2: 0,
623 pxms_me: 0x7e00/*0x7fff*/,
625 PXMS_CFG_SMTH_m | PXMS_CFG_MD2E_m | PXMS_CFG_HLS_m | PXMS_CFG_I2PT_m * 0 |
630 /*pxms_ptamp: 0x7fff,*/
644 pxmc_rocon_pwm_dc_out,
648 pxmc_inp_rocon_ap2hw,
649 pxms_ap: 0, pxms_as: 0,
650 pxms_rp: 55 * 256, pxms_rs: 0, pxms_subdiv: 8,
651 pxms_md: 800 << 8, pxms_ms: 1000, pxms_ma: 10,
654 pxms_ene: 0, pxms_erc: 0,
655 pxms_p: 80, pxms_i: 30, pxms_d: 200, pxms_s1: 200, pxms_s2: 0,
656 pxms_me: 0x7e00/*0x7fff*/,
658 PXMS_CFG_SMTH_m | PXMS_CFG_MD2E_m | PXMS_CFG_HLS_m | PXMS_CFG_I2PT_m * 0 |
663 /*pxms_ptamp: 0x7fff,*/
677 pxmc_rocon_pwm_dc_out,
681 pxmc_inp_rocon_ap2hw,
682 pxms_ap: 0, pxms_as: 0,
683 pxms_rp: 55 * 256, pxms_rs: 0, pxms_subdiv: 8,
684 pxms_md: 800 << 8, pxms_ms: 1000, pxms_ma: 10,
687 pxms_ene: 0, pxms_erc: 0,
688 pxms_p: 80, pxms_i: 30, pxms_d: 200, pxms_s1: 200, pxms_s2: 0,
689 pxms_me: 0x7e00/*0x7fff*/,
691 PXMS_CFG_SMTH_m | PXMS_CFG_MD2E_m | PXMS_CFG_HLS_m | PXMS_CFG_I2PT_m * 0 |
696 /*pxms_ptamp: 0x7fff,*/
710 pxmc_rocon_pwm_dc_out,
714 pxmc_inp_rocon_ap2hw,
715 pxms_ap: 0, pxms_as: 0,
716 pxms_rp: 55 * 256, pxms_rs: 0, pxms_subdiv: 8,
717 pxms_md: 800 << 8, pxms_ms: 1000, pxms_ma: 10,
720 pxms_ene: 0, pxms_erc: 0,
721 pxms_p: 80, pxms_i: 30, pxms_d: 200, pxms_s1: 200, pxms_s2: 0,
722 pxms_me: 0x7e00/*0x7fff*/,
724 PXMS_CFG_SMTH_m | PXMS_CFG_MD2E_m | PXMS_CFG_HLS_m | PXMS_CFG_I2PT_m * 0 |
729 /*pxms_ptamp: 0x7fff,*/
735 pxmc_state_t *pxmc_main_arr[PXML_MAIN_CNT] =
736 {&mcs0, &mcs1, &mcs2, &mcs3, &mcs4, &mcs5, &mcs6, &mcs7};
739 pxmc_state_list_t pxmc_main_list =
746 void pxmc_lpc_qei_callback_index(struct lpc_qei_state_t *qst, void *context)
748 pxmc_state_t *mcs = (pxmc_state_t *)context;
751 irc = qst->index_pos;
753 if ((mcs->pxms_cfg & PXMS_CFG_I2PT_m) && (mcs->pxms_flg & PXMS_PTI_m))
756 ofs = irc - mcs->pxms_ptmark;
757 diff = ofs - mcs->pxms_ptofs;
759 if (diff >= mcs->pxms_ptirc / 2)
760 diff -= mcs->pxms_ptirc;
762 if (diff <= -mcs->pxms_ptirc / 2)
763 diff += mcs->pxms_ptirc;
768 if (diff >= mcs->pxms_ptirc / 6)
770 pxmc_set_errno(mcs, PXMS_E_I2PT_TOOBIG);
774 mcs->pxms_ptofs = ofs;
775 pxmc_set_flag(mcs, PXMS_PHA_b);
779 ofs=irc-mcs->pxms_ptofs;
780 if((unsigned short)ofs>=(unsigned short)mcs->pxms_ptirc) {
782 ofs-=mcs->pxms_ptirc;
784 ofs+=mcs->pxms_ptirc;
787 mcs->pxms_ptmark=ofs;
790 /*lpc_qei_set_cmpos(qst, 0, qst->index_pos-4000);*/
793 int pxmc_lpc_pthalalign_callback(pxmc_state_t *mcs)
797 lpc_qei_state_t *qst = &lpc_qei_state;
798 int irc = lpc_qei_get_pos(qst);
804 idx_rel = qst->index_pos - irc;
805 idx_rel %= mcs->pxms_ptirc;
808 idx_rel += mcs->pxms_ptirc;
810 ptofs = irc - mcs->pxms_ptofs;
811 ptmark = ptofs + idx_rel;
813 if ((unsigned short)ptmark >= mcs->pxms_ptirc)
816 ptmark -= mcs->pxms_ptirc;
818 ptmark += mcs->pxms_ptirc;
821 if ((unsigned short)ptmark < mcs->pxms_ptirc)
823 mcs->pxms_ptmark = ptmark;
829 int pxmc_lpc_pthalalign(pxmc_state_t *mcs, int periods)
834 pxmc_call_t *fin_fnc = pxmc_lpc_pthalalign_callback;
835 lpc_qei_state_t *qst = &lpc_qei_state;
837 mcs->pxms_cfg &= ~PXMS_CFG_I2PT_m;
838 lpc_qei_setup_index_catch(qst);
840 r2acq = ((long)mcs->pxms_ptirc << PXMC_SUBDIV(mcs)) * periods;
841 spd = 1 << PXMC_SUBDIV(mcs);
843 res = pxmc_pthalalign(mcs, r2acq, spd, fin_fnc);
848 int pxmc_lpc_pthalalign_run(void)
850 return pxmc_lpc_pthalalign(pxmc_main_list.pxml_arr[0], 20);
853 static inline void pxmc_sfi_input(void)
857 pxmc_for_each_mcs(var, mcs)
859 /* PXMS_ENI_m - check if input (IRC) update is enabled */
860 if (mcs->pxms_flg & PXMS_ENI_m)
862 pxmc_call(mcs, mcs->pxms_do_inp);
867 static inline void pxmc_sfi_controller_and_output(void)
871 pxmc_for_each_mcs(var, mcs)
873 /* PXMS_ENR_m - check if controller is enabled */
874 if (mcs->pxms_flg & PXMS_ENR_m || mcs->pxms_flg & PXMS_ENO_m)
877 /* If output only is enabled, we skip the controller */
878 if (mcs->pxms_flg & PXMS_ENR_m)
881 pxmc_call(mcs, mcs->pxms_do_con);
883 /* PXMS_ERR_m - if axis in error state */
884 if (mcs->pxms_flg & PXMS_ERR_m)
888 /* for bushless motors, it is necessary to call do_out
889 even if the controller is not enabled and PWM should be provided. */
890 pxmc_call(mcs, mcs->pxms_do_out);
895 static inline void pxmc_sfi_generator(void)
899 pxmc_for_each_mcs(var, mcs)
901 /* PXMS_ENG_m - check if requested value (position) generator is enabled */
902 if (mcs->pxms_flg & PXMS_ENG_m)
904 pxmc_call(mcs, mcs->pxms_do_gen);
909 static inline void pxmc_sfi_dbg(void)
913 pxmc_for_each_mcs(var, mcs)
915 if (mcs->pxms_flg & PXMS_DBG_m)
917 pxmc_call(mcs, mcs->pxms_do_deb);
923 pxmc_axis_pt4mode(pxmc_state_t *mcs, int mode)
927 mcs->pxms_ptvang = pxmc_ptvang_deg2irc(mcs, 90);
929 /* res = pxmc_init_ptable(mcs, PXMC_PTPROF_SIN3FUP); */
930 #ifndef PXMC_WITH_PT_ZIC
931 res = pxmc_ptable_set_profile(mcs, &pxmc_ptprofile_sin3phup, 0, 0);
932 #else /*PXMC_WITH_PT_ZIC*/
933 res = pxmc_ptable_set_profile(mcs, &pxmc_ptprofile_sin3phup_zic, 0, 0);
934 #endif /*PXMC_WITH_PT_ZIC*/
940 * pxmc_axis_mode - Sets axis mode.[extern API]
941 * @mcs: Motion controller state information
942 * @mode: 0 .. previous mode, 1 .. stepper motor mode,
943 * 2 .. stepper motor with IRC feedback and PWM ,
944 * 3 .. stepper motor with PWM control
945 * 4 .. DC motor with IRC feedback and PWM
949 pxmc_axis_mode(pxmc_state_t *mcs, int mode)
953 pxmc_set_const_out(mcs, 0);
954 pxmc_clear_flag(mcs, PXMS_ENI_b);
955 pxmc_clear_flag(mcs, PXMS_PHA_b);
956 pxmc_clear_flag(mcs, PXMS_PTI_b);
960 /*mode=pxmc_axis_rdmode(mcs);*/
962 mode = PXMC_AXIS_MODE_BLDC;
965 res = pxmc_axis_pt4mode(mcs, mode);
967 pxmc_set_flag(mcs, PXMS_ENI_b);
971 void pxmc_sfi_isr(void)
974 pxmc_sfi_controller_and_output();
975 pxmc_sfi_generator();
984 if (!pxmc_main_list.pxml_cnt)
987 pxmc_for_each_mcs(var, mcs)
989 pxmc_set_const_out(mcs,0);
992 pxmc_main_list.pxml_cnt = 0;
998 int pxmc_initialize(void)
1002 pxmc_state_t *mcs = &mcs0;
1003 lpc_qei_state_t *qst = &lpc_qei_state;
1005 *fpga_irc_reset = 1;
1007 /* Initialize QEI module for IRC counting */
1008 pxmc_inp_lpc_qei_init(mcs->pxms_inp_info);
1010 /* Initialize QEI events processing */
1011 if (lpc_qei_setup_irq(qst) < 0)
1014 *fpga_irc_reset = 0;
1016 //res = pxmc_axis_pt4mode(mcs, PXMC_AXIS_MODE_BLDC);
1018 /*pxmc_ctm4pwm3f_wr(mcs, 0, 0, 0);*/
1019 //pxmc_rocon_pwm3ph_wr(mcs, 0, 0, 0);
1021 pxmc_rocon_pwm_master_init();
1023 pxmc_main_list.pxml_cnt = 0;
1024 pxmc_dbg_hist = NULL;
1026 pxmc_main_list.pxml_cnt = PXML_MAIN_CNT;