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RoCoN: Include SDRAM test into command processor.
[fpga/lx-cpu1/lx-rocon.git] / sw / app / rocon / appl_tests.c
1 #include <system_def.h>
2 #include <stdio.h>
3 #include <unistd.h>
4 #include <string.h>
5 #include <ctype.h>
6 #include <stddef.h>
7 #include <malloc.h>
8 #include <utils.h>
9 #include <cmd_proc.h>
10 #include <hal_gpio.h>
11 #include <hal_machperiph.h>
12 #include <LPC17xx.h>
13 #include <spi_drv.h>
14
15 #include <ul_log.h>
16 #include <ul_logreg.h>
17
18 #include "appl_defs.h"
19
20 int cmd_do_test_memusage(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
21 {
22   void *maxaddr;
23   char str[40];
24
25   maxaddr = sbrk(0);
26
27   snprintf(str,sizeof(str),"memusage maxaddr 0x%08lx\n",(unsigned long)maxaddr);
28   cmd_io_write(cmd_io,str,strlen(str));
29
30   return 0;
31 }
32
33 int cmd_do_test_adc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
34 {
35   printf("ADC: %ld %ld %ld %ld %ld\n",(LPC_ADC->DR[0] & 0xFFF0)>>4,
36                                       (LPC_ADC->DR[1] & 0xFFF0)>>4,
37                                       (LPC_ADC->DR[2] & 0xFFF0)>>4,
38                                       (LPC_ADC->DR[3] & 0xFFF0)>>4,
39                                       (LPC_ADC->DR[7] & 0xFFF0)>>4);
40   return 0;
41 }
42
43 #ifdef APPL_WITH_DISTORE_EEPROM_USER
44 int cmd_do_test_distore(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
45 {
46   appl_distore_user_set_check4change();
47   return 0;
48 }
49
50 int cmd_do_test_diload(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
51 {
52   appl_distore_user_restore();
53   return 0;
54 }
55 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
56
57 int cmd_do_test_loglevel_cb(ul_log_domain_t *domain, void *context)
58 {
59   char s[30];
60   cmd_io_t *cmd_io = (cmd_io_t *)context;
61
62   s[sizeof(s)-1]=0;
63   snprintf(s,sizeof(s)-1,"%s (%d)\n\r",domain->name, domain->level);
64   cmd_io_puts(cmd_io, s);
65   return 0;
66 }
67
68 int cmd_do_test_loglevel(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
69 {
70   int res=0;
71   char *line;
72   line = param[1];
73
74   if(!line||(si_skspace(&line),!*line)) {
75     ul_logreg_for_each_domain(cmd_do_test_loglevel_cb, cmd_io);
76   } else {
77     res=ul_log_domain_arg2levels(line);
78   }
79
80   return res>=0?0:CMDERR_BADPAR;
81 }
82
83 int cmd_do_spimst_blocking(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
84 {
85   int res;
86   int opchar;
87   char *p=param[3];
88   int spi_chan = (int)(intptr_t)des->info[0];
89   uint8_t *tx_buff = NULL;
90   uint8_t *rx_buff = NULL;
91   long addr = 0;
92   int len = 0;
93   spi_drv_t *spi_drv;
94
95   if((opchar=cmd_opchar_check(cmd_io,des,param))<0) return opchar;
96   if(opchar!=':') 
97     return -CMDERR_OPCHAR;
98
99   if(spi_chan==-1)
100     spi_chan=*param[1]-'0';
101
102   spi_drv = spi_find_drv(NULL, spi_chan);
103   if(spi_drv==NULL)
104     return -CMDERR_BADSUF;
105
106   p=param[3];
107
108   si_skspace(&p);
109   if(isdigit((int)*p)){
110     if(si_long(&p,&addr,16)<0) return -CMDERR_BADPAR;
111   }
112   if(si_fndsep(&p,"({")<0) return -CMDERR_BADSEP;
113
114   if((res=si_add_to_arr(&p, (void**)&tx_buff, &len, 16, 1, "})"))<0)
115     return -CMDERR_BADPAR;
116
117   rx_buff=malloc(len);
118
119   res=-1;
120   if(rx_buff!=NULL)
121     res = spi_transfer(spi_drv, addr, len, tx_buff, rx_buff);
122
123   if(res < 0) {
124     printf("SPI! %02lX ERROR\n",addr);
125   } else {
126     int i;
127     printf("SPI! %02lX ",addr);
128     printf("TX(");
129     for(i=0;i<len;i++) printf("%s%02X",i?",":"",tx_buff[i]);
130     printf(") RX(");
131     for(i=0;i<len;i++) printf("%s%02X",i?",":"",rx_buff[i]);
132     printf(")");
133     printf("\n");
134     return 0;
135   }
136
137   if(rx_buff)
138     free(rx_buff);
139   if(tx_buff)
140     free(tx_buff);
141
142   return 0;
143 }
144
145 #ifdef SDRAM_BASE
146 int sdram_access_test(void)
147 {
148   unsigned int *ptr;
149   unsigned int pattern;
150   size_t ramsz = SDRAM_SIZE;
151   size_t cnt;
152   lt_mstime_t tic;
153   size_t blksz, i;
154
155   lt_mstime_update();
156   tic = actual_msec;
157
158   pattern = 0x12abcdef;
159   for (cnt = ramsz/sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;) {
160     *(ptr++) = pattern;
161     pattern = pattern + 0x87654321;
162   }
163
164   lt_mstime_update();
165   printf("SDRAM write %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
166
167   lt_mstime_update();
168   tic = actual_msec;
169
170   pattern = 0x12abcdef;
171   for (cnt = ramsz/sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;) {
172     if(*ptr != pattern) {
173       printf("SDRAM error modify at %p (%08x)\n", ptr, *ptr ^ pattern);
174       return -1;
175     }
176     *(ptr++) = ~pattern;
177     pattern = pattern + 0x87654321;
178   }
179
180   lt_mstime_update();
181   printf("SDRAM modify %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
182
183   lt_mstime_update();
184   tic = actual_msec;
185
186   pattern = 0x12abcdef;
187   for (cnt = ramsz/sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;) {
188     if(*(ptr++) != ~pattern) {
189       printf("SDRAM error read at %p (%08x)\n", ptr, *ptr ^ pattern);
190       return -1;
191     }
192     pattern = pattern + 0x87654321;
193   }
194
195   lt_mstime_update();
196   printf("SDRAM read %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
197
198   lt_mstime_update();
199   tic = actual_msec;
200
201   pattern = 0;
202   for (cnt = ramsz/sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;) {
203     pattern += *(ptr++);
204   }
205
206   lt_mstime_update();
207   printf("SDRAM sum %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), pattern);
208
209   for (blksz=1; blksz < 256 ; blksz *= 2) {
210     lt_mstime_update();
211     tic = actual_msec;
212
213     pattern = 0;
214     for (cnt = ramsz/sizeof(*ptr); cnt; cnt -= blksz) {
215       ptr = (typeof(ptr))SDRAM_BASE;
216       //ptr = (typeof(ptr))cmd_do_test_memusage;
217       //ptr = (typeof(ptr))&ptr;
218       for (i = blksz; i--; )
219         pattern += *(ptr++);
220     }
221     lt_mstime_update();
222     printf("SDRAM sum %d blksz %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), (int)blksz, pattern);
223   }
224
225   return 0;
226 }
227
228 int cmd_do_testsdram(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
229 {
230   sdram_access_test();
231   return 0;
232 }
233 #endif /*SDRAM_BASE*/
234
235 cmd_des_t const cmd_des_test_memusage={0, 0,
236                         "memusage","report memory usage",cmd_do_test_memusage,
237                         {0,
238                          0}};
239
240 cmd_des_t const cmd_des_test_adc={0, 0,
241                         "testadc","adc test",cmd_do_test_adc,
242                         {0,
243                          0}};
244
245 #ifdef APPL_WITH_DISTORE_EEPROM_USER
246 cmd_des_t const cmd_des_test_distore={0, 0,
247                         "testdistore","test DINFO store",cmd_do_test_distore,
248                         {0,
249                          0}};
250
251 cmd_des_t const cmd_des_test_diload={0, 0,
252                         "testdiload","test DINFO load",cmd_do_test_diload,
253                         {0,
254                          0}};
255 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
256
257 cmd_des_t const cmd_des_test_loglevel={0, 0,
258                         "loglevel","select logging level",
259                         cmd_do_test_loglevel,{}};
260
261 cmd_des_t const cmd_des_spimst={0, CDESM_OPCHR|CDESM_WR,
262                         "SPIMST","SPI master communication request",
263                         cmd_do_spimst_blocking,{(void*)0}};
264
265 cmd_des_t const cmd_des_spimstx={0, CDESM_OPCHR|CDESM_WR,
266                         "SPIMST#","SPI# master communication request",
267                         cmd_do_spimst_blocking,{(void*)-1}};
268
269 #ifdef SDRAM_BASE
270 cmd_des_t const cmd_des_testsdram={0, 0,
271                         "testsdram","test SDRAM",
272                         cmd_do_testsdram,{(void*)0}};
273 #endif /*SDRAM_BASE*/
274
275 cmd_des_t const *const cmd_appl_tests[]={
276   &cmd_des_test_memusage,
277   &cmd_des_test_adc,
278  #ifdef APPL_WITH_DISTORE_EEPROM_USER
279   &cmd_des_test_distore,
280   &cmd_des_test_diload,
281  #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
282   &cmd_des_test_loglevel,
283   &cmd_des_spimst,
284   &cmd_des_spimstx,
285  #ifdef SDRAM_BASE
286   &cmd_des_testsdram,
287  #endif /*SDRAM_BASE*/
288   NULL
289 };