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Shift some external signals by half of clock cycle to visualize synchronization.
[fpga/lx-cpu1/lx-dad.git] / hw / tb / lx_dad_top_tb.vhd
2015-02-15 Pavel PisaShift some external signals by half of clock cycle... blob | commitdiff | raw
2015-02-15 Pavel PisaInclude testbed for simulation in GHDL. blob | commitdiff | raw | diff to current