#include "Cpu.h"\r
#include "Mcu.h"\r
#include "CanIf_Cbk.h"\r
-#include "Det.h"\r
+#include "Det.h"
+#if defined(USE_DEM)
+#include "Dem.h"\r
+#endif
#include <assert.h>\r
#include <stdlib.h>\r
#include <string.h>\r
#if defined(USE_KERNEL)\r
- #include "Os.h"\r
+ #include "Os.h"
+ #include "int_ctrl.h"\r
#endif\r
\r
\r
/* CONFIGURATION NOTES\r
* ------------------------------------------------------------------\r
- * - CanHandleType must be CAN_ECORE_HANDLE_TYPE_BASIC\r
- * i.e. CanHandleType=CAN_ECORE_HANDLE_TYPE_FULL NOT supported\r
+ * - CanHandleType must be CAN_ARC_HANDLE_TYPE_BASIC\r
+ * i.e. CanHandleType=CAN_ARC_HANDLE_TYPE_FULL NOT supported\r
* i.e CanIdValue is NOT supported\r
- * - All CanXXXProcessing must be CAN_ECORE_PROCESS_TYPE_INTERRUPT\r
- * ie CAN_ECORE_PROCESS_TYPE_POLLED not supported\r
- * - To select the Mailboxes to use in the CAN controller use CanEcoreMbMask\r
+ * - All CanXXXProcessing must be CAN_ARC_PROCESS_TYPE_INTERRUPT\r
+ * ie CAN_ARC_PROCESS_TYPE_POLLED not supported\r
+ * - To select the Mailboxes to use in the CAN controller use Can_Arc_MbMask\r
* - HOH's for Tx are global and Rx are for each controller\r
* - CanControllerTimeQuanta is NOT used. The other CanControllerXXX selects\r
* the proper time-quanta\r
- * - CanEcoreMbMask for Tx HOH must NOT overlap CanEcoreMbMask for Rx.\r
+ * - Can_Arc_MbMask for Tx HOH must NOT overlap Can_Arc_MbMask for Rx.\r
* - ONLY global mask is supported( NOT 14,15 and individual )\r
* - Numbering the CanObjectId for Tx:\r
* To do this correctly there are a number of things that are good to know\r
* 1. HTH's have unique numbers.\r
* 2. One HTH/HRH is maped to one HOH\r
- * 3. The extension CanEcoreMbMask binds FULL CAN boxes together.\r
+ * 3. The extension Can_Arc_MbMask binds FULL CAN boxes together.\r
*\r
* Example:\r
*\r
* 1 F 0 1\r
* ..\r
* 16 B 0 16 |\r
- * 17 | The use of CanEcoreMbMask=0x000f0000 binds these to HTH 16\r
+ * 17 | The use of Can_Arc_MbMask=0x000f0000 binds these to HTH 16\r
* 18 | ( bits 16 to 19 set here )\r
* 19 |\r
* ...\r
#define VALIDATE_NO_RV(_exp,_api,_err )\r
#define DET_REPORTERROR(_x,_y,_z,_q)\r
#endif\r
-\r
+
+#if defined(USE_DEM)
+#define VALIDATE_DEM_NO_RV(_exp,_err ) \
+ if( !(_exp) ) { \
+ Dem_ReportErrorStatus(_err, DEM_EVENT_STATUS_FAILED); \
+ return; \
+ }
+#else
+#define VALIDATE_DEM_NO_RV(_exp,_err )
+#endif
+
//-------------------------------------------------------------------\r
\r
// Message box status defines\r
#endif\r
\r
// Mapping between HRH and Controller//HOH\r
- typedef struct Can_EcoreObjectHOHMapStruct\r
+ typedef struct Can_Arc_ObjectHOHMapStruct\r
{\r
uint32 HxHRef; // Reference to HRH or HTH\r
CanControllerIdType CanControllerRef; // Reference to controller\r
const Can_HardwareObjectType* CanHOHRef; // Reference to HOH.\r
- } Can_EcoreObjectHOHMapType;\r
+ } Can_Arc_ObjectHOHMapType;\r
\r
/* Type for holding global information used by the driver */\r
typedef struct {\r
\r
// This is a map that maps the HTH:s with the controller and Hoh. It is built\r
// during Can_Init and is used to make things faster during a transmit.\r
- Can_EcoreObjectHOHMapType CanHTHMap[NUM_OF_HTHS];\r
+ Can_Arc_ObjectHOHMapType CanHTHMap[NUM_OF_HTHS];\r
} Can_GlobalType;\r
\r
// Global config\r
CanIf_ControllerModeType state;\r
uint32 lock_cnt;\r
// Interrupt masks that is for all Mb's in this controller\r
- uint32 CanEcoreRxMbMask;\r
- uint32 CanEcoreTxMbMask;\r
+ uint32 Can_Arc_RxMbMask;\r
+ uint32 Can_Arc_TxMbMask;\r
\r
// Used at IFLG in controller at startup\r
uint32 iflagStart;\r
\r
// Statistics\r
- Can_EcoreStatisticsType stats;\r
+ Can_Arc_StatisticsType stats;\r
\r
// Data stored for Txconfirmation callbacks to CanIf\r
PduIdType swPduHandles[MAX_NUM_OF_MAILBOXES];\r
* @param hth The transmit handle\r
* @returns Ptr to the Hoh\r
*/\r
- static const Can_HardwareObjectType * Can_FindHoh( Can_EcoreHTHType hth , uint32* controller)\r
+ static const Can_HardwareObjectType * Can_FindHoh( Can_Arc_HTHType hth , uint32* controller)\r
{\r
const Can_HardwareObjectType *hohObj;\r
- const Can_EcoreObjectHOHMapType *map;\r
+ const Can_Arc_ObjectHOHMapType *map;\r
const Can_ControllerConfigType *canHwConfig;\r
\r
map = &Can_Global.CanHTHMap[hth];\r
\r
static void Can_Err( int unit ) {\r
flexcan_t *canHw = GET_CONTROLLER(unit);\r
- Can_EcoreErrorType err;\r
+ Can_Arc_ErrorType err;\r
ESRType esr;\r
err.R = 0;\r
\r
err.B.RXWRN = esr.B.RXWRN;\r
err.B.TXWRN = esr.B.TXWRN;\r
\r
- if (GET_CALLBACKS()->EcoreError != NULL)\r
+ if (GET_CALLBACKS()->Arc_Error != NULL)\r
{\r
- GET_CALLBACKS()->EcoreError(unit, err );\r
+ GET_CALLBACKS()->Arc_Error(unit, err );\r
}\r
// Clear ERRINT\r
canHw->ESR.B.ERRINT = 1;\r
uint8 mbNr;\r
\r
// Find our Tx boxes.\r
- mbMask = canUnit->CanEcoreTxMbMask;\r
+ mbMask = canUnit->Can_Arc_TxMbMask;\r
\r
// Loop over the Mb's set to abort\r
for (; mbMask; mbMask&=~(1<<mbNr)) {\r
}\r
\r
// Ack tx interrupts\r
- canHw->IFRL.R = canUnit->CanEcoreTxMbMask;\r
- canUnit->iflagStart = canUnit->CanEcoreTxMbMask;\r
+ canHw->IFRL.R = canUnit->Can_Arc_TxMbMask;\r
+ canUnit->iflagStart = canUnit->Can_Arc_TxMbMask;\r
}\r
\r
//-------------------------------------------------------------------\r
static void Can_BusOff( int unit ) {\r
flexcan_t *canHw = GET_CONTROLLER(unit);\r
Can_UnitType *canUnit = GET_PRIVATE_DATA(unit);\r
- Can_EcoreErrorType err;\r
+ Can_Arc_ErrorType err;\r
err.R = 0;\r
\r
if ( canHw->ESR.B.TWRNINT )\r
\r
if (err.R != 0)\r
{\r
- if (GET_CALLBACKS()->EcoreError != NULL)\r
+ if (GET_CALLBACKS()->Arc_Error != NULL)\r
{\r
- GET_CALLBACKS()->EcoreError( unit, err );\r
+ GET_CALLBACKS()->Arc_Error( unit, err );\r
}\r
}\r
\r
//\r
\r
// Rx\r
- hohObj= canHwConfig->CanEcoreHoh;\r
+ hohObj= canHwConfig->Can_Arc_Hoh;\r
--hohObj;\r
do {\r
++hohObj;\r
\r
- mbMask = hohObj->CanEcoreMbMask & iFlagLow;\r
+ mbMask = hohObj->Can_Arc_MbMask & iFlagLow;\r
\r
if (hohObj->CanObjectType == CAN_OBJECT_TYPE_RECEIVE)\r
{\r
canHw->IFRL.R = (1<<mbNr);\r
}\r
}\r
- } while ( !hohObj->CanEcoreEOL);\r
+ } while ( !hohObj->Can_Arc_EOL);\r
\r
// Tx\r
- hohObj= canHwConfig->CanEcoreHoh;\r
+ hohObj= canHwConfig->Can_Arc_Hoh;\r
--hohObj;\r
do {\r
++hohObj;\r
\r
if (hohObj->CanObjectType == CAN_OBJECT_TYPE_TRANSMIT)\r
{\r
- mbMask = hohObj->CanEcoreMbMask & iFlagLow;\r
+ mbMask = hohObj->Can_Arc_MbMask & iFlagLow;\r
\r
// Loop over the Mb's for this Hoh\r
for (; mbMask; mbMask&=~(1<<mbNr)) {\r
canHw->IFRL.R = (1<<mbNr);\r
}\r
}\r
- } while ( !hohObj->CanEcoreEOL);\r
+ } while ( !hohObj->Can_Arc_EOL);\r
#if defined(CFG_MPC5516) || defined(CFG_MPC5517)\r
} // FIFO code\r
#endif\r
// - Interupt on a masked box\r
}\r
\r
- if (canHwConfig->CanEcoreFifo) {\r
+ if (canHwConfig->Can_Arc_Fifo) {\r
/* Note\r
* NOT tested at all\r
*/\r
Can_Global.initRun = CAN_READY;\r
\r
\r
- for (int configId=0; configId < CAN_ECORE_CTRL_CONFIG_CNT; configId++) {\r
+ for (int configId=0; configId < CAN_ARC_CTRL_CONFIG_CNT; configId++) {\r
canHwConfig = GET_CONTROLLER_CONFIG(configId);\r
ctlrId = canHwConfig->CanControllerId;\r
\r
canUnit->lock_cnt = 0;\r
\r
// Clear stats\r
- memset(&canUnit->stats, 0, sizeof(Can_EcoreStatisticsType));\r
+ memset(&canUnit->stats, 0, sizeof(Can_Arc_StatisticsType));\r
\r
Can_InitController(ctlrId, canHwConfig);\r
\r
// Loop through all Hoh:s and map them into the HTHMap\r
const Can_HardwareObjectType* hoh;\r
- hoh = canHwConfig->CanEcoreHoh;\r
+ hoh = canHwConfig->Can_Arc_Hoh;\r
hoh--;\r
do\r
{\r
Can_Global.CanHTHMap[hoh->CanObjectId].CanHOHRef = hoh;\r
Can_Global.CanHTHMap[hoh->CanObjectId].HxHRef = hoh->CanObjectId;\r
}\r
- } while (!hoh->CanEcoreEOL);\r
+ } while (!hoh->Can_Arc_EOL);\r
\r
// Note!\r
// Could install handlers depending on HW objects to trap more errors\r
const Can_ControllerConfigType *canHwConfig;\r
uint32 ctlrId;\r
\r
- for (int configId=0; configId < CAN_ECORE_CTRL_CONFIG_CNT; configId++) {\r
+ for (int configId=0; configId < CAN_ARC_CTRL_CONFIG_CNT; configId++) {\r
canHwConfig = GET_CONTROLLER_CONFIG(configId);\r
ctlrId = canHwConfig->CanControllerId;\r
\r
canUnit->lock_cnt = 0;\r
\r
// Clear stats\r
- memset(&canUnit->stats, 0, sizeof(Can_EcoreStatisticsType));\r
+ memset(&canUnit->stats, 0, sizeof(Can_Arc_StatisticsType));\r
}\r
\r
Can_Global.config = NULL;\r
#if defined(CFG_MPC5516) || defined(CFG_MPC5517)\r
// Note!\r
// FIFO implemenation not tested\r
- if( config->CanEcoreFifo ) {\r
+ if( config->Can_Arc_Fifo ) {\r
canHw->MCR.B.FEN = 1; // Enable FIFO\r
canHw->MCR.B.IDAM = 0; // We want extended id's to match with\r
}\r
canHw->MCR.B.MAXMB = MAX_NUM_OF_MAILBOXES - 1;\r
\r
/* Disable selfreception */\r
- canHw->MCR.B.SRXDIS = !config->CanEcoreLoopback;\r
+ canHw->MCR.B.SRXDIS = !config->Can_Arc_Loopback;\r
\r
// Clock calucation\r
// -------------------------------------------------------------------\r
tq2 = (config->CanControllerSeg2 + 1);\r
tq = 1 + tq1 + tq2;\r
\r
- // Check TQ limitations..\r
- VALIDATE_NO_RV(( (tq1>=4) && (tq1<=16)), 0x2, CAN_E_TIMEOUT ); // Actually should be sent to DEM\r
- VALIDATE_NO_RV(( (tq2>=2) && (tq2<=8)), 0x2, CAN_E_TIMEOUT ); // but this is the next best thing\r
- VALIDATE_NO_RV(( (tq>8) && (tq<25 )), 0x2, CAN_E_TIMEOUT );\r
+ // Check TQ limitations..
+ VALIDATE_DEM_NO_RV(( (tq1>=4) && (tq1<=16)), CAN_E_TIMEOUT );\r
+ VALIDATE_DEM_NO_RV(( (tq2>=2) && (tq2<=8)), CAN_E_TIMEOUT );\r
+ VALIDATE_DEM_NO_RV(( (tq>8) && (tq<25 )), CAN_E_TIMEOUT );\r
\r
// Assume we're using the peripheral clock instead of the crystal.\r
clock = McuE_GetPeripheralClock(config->CanCpuClockRef);\r
canHw->CR.B.PSEG1 = config->CanControllerSeg1;\r
canHw->CR.B.PSEG2 = config->CanControllerSeg2;\r
canHw->CR.B.SMP = 1; // 3 samples better than 1 ??\r
- canHw->CR.B.LPB = config->CanEcoreLoopback;\r
+ canHw->CR.B.LPB = config->Can_Arc_Loopback;\r
canHw->CR.B.BOFFREC = 1; // Disable bus off recovery\r
\r
#if defined(CFG_MPC5516) || defined(CFG_MPC5517)\r
// Check if we use individual masks. If so accept anything(=0) for now\r
if( canHw->MCR.B.BCC ) {\r
- i = (config->CanEcoreFifo ? 8 : 0 );\r
+ i = (config->Can_Arc_Fifo ? 8 : 0 );\r
for(;i<63;i++) {\r
canHw->RXIMR[i].R = 0;\r
}\r
#else\r
#endif\r
// Set the id's\r
- if( config->CanEcoreFifo ) {\r
+ if( config->Can_Arc_Fifo ) {\r
// Clear ID's in FIFO also, MUST set extended bit here\r
uint32_t *fifoId = (uint32_t*)(((uint8_t *)canHw)+0xe0);\r
for(int k=0;k<8;k++) {\r
}\r
\r
// Mark all slots as inactive( depending on fifo )\r
- i = (config->CanEcoreFifo ? 8 : 0 );\r
+ i = (config->Can_Arc_Fifo ? 8 : 0 );\r
for(; i < 63; i++) {\r
//canHw->BUF[i].CS.B.CODE = 0;\r
canHw->BUF[i].CS.R = 0;\r
Can_FilterMaskType mask = 0xffffffff;\r
\r
// Rx\r
- hohObj = canHwConfig->CanEcoreHoh;\r
+ hohObj = canHwConfig->Can_Arc_Hoh;\r
--hohObj;\r
do {\r
++hohObj;\r
\r
- mbMask = hohObj->CanEcoreMbMask;\r
+ mbMask = hohObj->Can_Arc_MbMask;\r
mbNr = 0;\r
\r
if (hohObj->CanObjectType == CAN_OBJECT_TYPE_RECEIVE)\r
}\r
\r
// Add to global mask\r
- canUnit->CanEcoreRxMbMask |= hohObj->CanEcoreMbMask;\r
+ canUnit->Can_Arc_RxMbMask |= hohObj->Can_Arc_MbMask;\r
if( hohObj->CanFilterMaskRef != NULL ) {\r
mask &= *hohObj->CanFilterMaskRef;\r
}\r
}\r
else\r
{\r
- canUnit->CanEcoreTxMbMask |= hohObj->CanEcoreMbMask;\r
+ canUnit->Can_Arc_TxMbMask |= hohObj->Can_Arc_MbMask;\r
}\r
- } while( !hohObj->CanEcoreEOL );\r
+ } while( !hohObj->Can_Arc_EOL );\r
\r
\r
// Set global mask\r
canHw->RX15MASK.R = 0;\r
}\r
\r
- canUnit->iflagStart = canUnit->CanEcoreTxMbMask;\r
+ canUnit->iflagStart = canUnit->Can_Arc_TxMbMask;\r
\r
canUnit->state = CANIF_CS_STOPPED;\r
Can_EnableControllerInterrupts(cId);\r
canHw->IMRH.R = 0;\r
canHw->IMRL.R = 0;\r
\r
- if( canHwConfig->CanRxProcessing == CAN_ECORE_PROCESS_TYPE_INTERRUPT ) {\r
+ if( canHwConfig->CanRxProcessing == CAN_ARC_PROCESS_TYPE_INTERRUPT ) {\r
/* Turn on the interrupt mailboxes */\r
- canHw->IMRL.R = canUnit->CanEcoreRxMbMask;\r
+ canHw->IMRL.R = canUnit->Can_Arc_RxMbMask;\r
}\r
\r
- if( canHwConfig->CanTxProcessing == CAN_ECORE_PROCESS_TYPE_INTERRUPT ) {\r
+ if( canHwConfig->CanTxProcessing == CAN_ARC_PROCESS_TYPE_INTERRUPT ) {\r
/* Turn on the interrupt mailboxes */\r
- canHw->IMRL.R |= canUnit->CanEcoreTxMbMask;\r
+ canHw->IMRL.R |= canUnit->Can_Arc_TxMbMask;\r
}\r
\r
// BusOff here represents all errors and warnings\r
- if( canHwConfig->CanBusOffProcessing == CAN_ECORE_PROCESS_TYPE_INTERRUPT ) {\r
+ if( canHwConfig->CanBusOffProcessing == CAN_ARC_PROCESS_TYPE_INTERRUPT ) {\r
canHw->MCR.B.WRNEN = 1; /* Turn On warning int */\r
\r
canHw->CR.B.ERRMSK = 1; /* Enable error interrupt */\r
return;\r
}\r
\r
- Can_ReturnType Can_Write( Can_EcoreHTHType hth, Can_PduType *pduInfo ) {\r
+ Can_ReturnType Can_Write( Can_Arc_HTHType hth, Can_PduType *pduInfo ) {\r
uint16_t timer;\r
uint32_t iflag;\r
Can_ReturnType rv = CAN_OK;\r
\r
canHw = GET_CONTROLLER(controller);\r
oldMsr = McuE_EnterCriticalSection();\r
- iflag = canHw->IFRL.R & canUnit->CanEcoreTxMbMask;\r
+ iflag = canHw->IFRL.R & canUnit->Can_Arc_TxMbMask;\r
\r
// check for any free box\r
// Normally we would just use the iflag to get the free box\r
* @param stats Pointer to data to copy statistics to\r
*/\r
\r
- void Can_EcoreGetStatistics( uint8 controller, Can_EcoreStatisticsType *stats)\r
+ void Can_Arc_GetStatistics( uint8 controller, Can_Arc_StatisticsType *stats)\r
{\r
Can_UnitType *canUnit = GET_PRIVATE_DATA(controller);\r
*stats = canUnit->stats;\r
return E_OK;\r
}\r
\r
- Can_ReturnType Can_Write( Can_EcoreHTHType hth, Can_PduType *pduInfo )\r
+ Can_ReturnType Can_Write( Can_Arc_HTHType hth, Can_PduType *pduInfo )\r
{\r
// Write to mailbox on controller here.\r
DEBUG(DEBUG_MEDIUM, "Can_Write(stub): Received data ");\r
void Can_MainFunction_BusOff( void ){}\r
void Can_MainFunction_Wakeup( void ){}\r
\r
- void Can_EcoreGetStatistics( uint8 controller, Can_EcoreStatisticsType * stat){}\r
+ void Can_Arc_GetStatistics( uint8 controller, Can_Arc_StatisticsType * stat){}\r
\r
#endif\r
\r
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