bcc FillZero\r
bx lr\r
\r
-\r
-\r
.size Reset_Handler, .-Reset_Handler\r
\r
-/**\r
- * @brief This is the code that gets called when the processor receives an \r
- * unexpected interrupt. This simply enters an infinite loop, preserving\r
- * the system state for examination by a debugger.\r
- *\r
- * @param None \r
- * @retval : None \r
-*/\r
- .section .text.Default_Handler,"ax",%progbits\r
-Default_Handler:\r
-Infinite_Loop:\r
- b Infinite_Loop\r
- .size Default_Handler, .-Default_Handler\r
\r
\r
\r
.extern Dummy_Irq\r
\r
/* This is the reset handler. Since the CPU is in ARM mode when this instruction is executed\r
- it has to be hard coded (otherwise GCC will compile it wrongly.\r
+ it has to be hard coded (otherwise it will compile wrong).\r
Instruction branches to address 0x22 while changing instruction mode to THUMB. */\r
.word 0xfb000006\r
- b Dummy_Irq /* Undefined instruction exception */\r
- b Svc_Handler /* SVC, to be able to use software interrupt instruction. */\r
- b Prefetch_Exc_Handler /* Prefetch exception */\r
- b Data_Exc_Handler /* Data exception */\r
- b Dummy_Irq /* Reserved */\r
- b Irq_Handler /* Ordinary interrupts (IRQ) */\r
- b Irq_Handler /* Fast interrupts (FIR) */\r
+\r
+ b Dummy_Irq /* Undefined instruction exception */\r
+ b Dummy_Irq /* SVC */\r
+ b Prefetch_Exc_Handler /* Prefetch exception */\r
+ b Data_Exc_Handler /* Data exception */\r
+ b Dummy_Irq /* Reserved */\r
+ b Irq_Handler /* Ordinary interrupts (IRQ) */\r
+ b Dummy_Irq /* Fast interrupts (FIR) */\r
\r
nop\r
b Reset_Handler /* Branch to the real reset handler. */\r