Initial commit of PORT driver for TMS570.

diff --git a/arch/arm/arm_cr4/drivers/Port.c b/arch/arm/arm_cr4/drivers/Port.c
new file mode 100644 (file)
index 0000000..1232fcb
--- /dev/null
+++ b/arch/arm/arm_cr4/drivers/Port.c
@@ -0,0 +1,208 @@
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009  ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include "Std_Types.h"\r
+#include "Port.h"\r
+#include "Det.h"\r
+#include "Cpu.h"\r
+#include <string.h>\r
+\r
+#define GET_PIN_PORT(_pin) (_pin >> 8)\r
+#define GET_PIN_PIN(_pin)  (_pin & 0x1F)\r
+#define GET_PIN_MASK(_pin) (1 << (_pin & 0x1F))\r
+\r
+typedef enum\r
+{\r
+    PORT_UNINITIALIZED = 0, PORT_INITIALIZED,\r
+} Port_StateType;\r
+\r
+\r
+typedef volatile struct\r
+{\r
+    uint32 FUN;\r
+    uint32 DIR;\r
+    uint32 DIN;\r
+    uint32 DOUT;\r
+    uint32 DSET;\r
+    uint32 DCLR;\r
+    uint32 PDR;\r
+    uint32 PULDIS;\r
+    uint32 PSL;\r
+} Port_RegisterType;\r
+\r
+\r
+#define PORT_NOT_CONFIGURED 0x00000000\r
+\r
+#define PORT_0_BASE ((Port_RegisterType *)0xFFF7BC30)\r
+#define PORT_1_BASE ((Port_RegisterType *)0xFFF7BC50)\r
+#define PORT_2_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_3_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_4_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_5_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_6_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_7_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_8_BASE ((Port_RegisterType *)0xFFF7DDE0)\r
+#define PORT_9_BASE ((Port_RegisterType *)0xFFF7DFE0)\r
+#define PORT_10_BASE ((Port_RegisterType *)0xFFF7E1E0)\r
+#define PORT_NUMBER_OF_PORTS 11\r
+\r
+static Port_RegisterType * const Port_Base[] =\r
+{\r
+    PORT_0_BASE,\r
+    PORT_1_BASE,\r
+    PORT_2_BASE,\r
+    PORT_3_BASE,\r
+    PORT_4_BASE,\r
+    PORT_5_BASE,\r
+    PORT_6_BASE,\r
+    PORT_7_BASE,\r
+    PORT_8_BASE,\r
+    PORT_9_BASE,\r
+    PORT_10_BASE,\r
+};\r
+\r
+\r
+\r
+static Port_StateType _portState = PORT_UNINITIALIZED;\r
+static const Port_ConfigType * _configPtr = &PortConfigData;\r
+\r
+#if (PORT_DEV_ERROR_DETECT)\r
+#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
+       if( (_ptr)==((void *)0) ) { \\r
+               Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
+               goto cleanup; \\r
+       }\r
+\r
+#define VALIDATE_STATE_INIT(_api)\\r
+       if(PORT_INITIALIZED!=_portState){\\r
+               Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
+               goto cleanup; \\r
+       }\r
+\r
+#define VALIDATE_PARAM_PIN(_pin, _api)\\r
+       if(GET_PIN_PORT(_pin) >= PORT_NUMBER_OF_PORTS || Port_Base[GET_PIN_PORT(_pin)] == PORT_NOT_CONFIGURED || GET_PIN_PIN(_pin) > 7 ){\\r
+               Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_PIN ); \\r
+               goto cleanup; \\r
+       }\r
+\r
+#else\r
+#define VALIDATE_PARAM_CONFIG(_ptr,_api)\r
+#define VALIDATE_STATE_INIT(_api)\r
+#define VALIDATE_PARAM_PIN(_pin, _api)\r
+#endif\r
+\r
+#if PORT_VERSION_INFO_API == STD_ON\r
+static Std_VersionInfoType _Port_VersionInfo =\r
+{\r
+  .vendorID   = (uint16)1,\r
+  .moduleID   = (uint16) MODULE_ID_PORT,\r
+  .instanceID = (uint8)1,\r
+  .sw_major_version = (uint8)PORT_SW_MAJOR_VERSION,\r
+  .sw_minor_version = (uint8)PORT_SW_MINOR_VERSION,\r
+  .sw_patch_version = (uint8)PORT_SW_PATCH_VERSION,\r
+  .ar_major_version = (uint8)PORT_AR_MAJOR_VERSION,\r
+  .ar_minor_version = (uint8)PORT_AR_MINOR_VERSION,\r
+  .ar_patch_version = (uint8)PORT_AR_PATCH_VERSION,\r
+};\r
+#endif\r
+\r
+void Port_Init(const Port_ConfigType *configType) {\r
+       VALIDATE_PARAM_CONFIG(configType, PORT_INIT_ID);\r
+\r
+       // Bring GIO register out of reset.\r
+       gioREG->GCR0 = 1;\r
+\r
+       for (uint16 i = 0; i < PORT_NUMBER_OF_PINS; i++) {\r
+               uint8 port = GET_PIN_PORT(configType->pins[i].pin);\r
+               uint32 mask = GET_PIN_MASK(configType->pins[i].pin);\r
+               uint16 conf = configType->pins[i].conf;\r
+\r
+               if (conf & PORT_FUNC) {\r
+                       // Don't do anything, let each driver configure???\r
+                       continue;\r
+               }\r
+\r
+               // Set pin direction\r
+               if (conf & PORT_PIN_IN) {\r
+                       Port_Base[port]->DIR &= ~mask;\r
+\r
+               } else {\r
+                       Port_Base[port]->DIR |= mask;\r
+\r
+                       // Set open drain\r
+                       if (conf & PORT_ODE_ENABLE) {\r
+                               Port_Base[port]->PDR |= mask;\r
+                       } else {\r
+                               Port_Base[port]->PDR &= ~mask;\r
+                       }\r
+               }\r
+\r
+               // Set pull up or down or nothing.\r
+               if (conf & PORT_PULL_NONE) {\r
+                       Port_Base[port]->PULDIS |= mask;\r
+\r
+               } else {\r
+                       Port_Base[port]->PULDIS &= ~mask;\r
+                       if (conf & PORT_PULL_UP) {\r
+                               Port_Base[port]->PSL |= mask;\r
+\r
+                       } else {\r
+                               Port_Base[port]->PSL &= ~mask;\r
+                       }\r
+               }\r
+       }\r
+       cleanup:return;\r
+}\r
+\r
+#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )\r
+void Port_SetPinDirection( Port_PinType pin, Port_PinDirectionType direction )\r
+{\r
+  VALIDATE_STATE_INIT(PORT_SET_PIN_DIRECTION_ID);\r
+  VALIDATE_PARAM_PIN(pin, PORT_SET_PIN_DIRECTION_ID);\r
+  // TODO IMPLEMENT!\r
+\r
+cleanup:return;\r
+}\r
+#endif\r
+\r
+void Port_RefreshPortDirection( void )\r
+{\r
+       // TODO IMPLEMENT!\r
+}\r
+\r
+#if PORT_VERSION_INFO_API == STD_ON\r
+void Port_GetVersionInfo(Std_VersionInfoType* versionInfo)\r
+{\r
+  VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
+  memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
+  cleanup: return;\r
+}\r
+#endif\r
+\r
+#if (PORT_SET_PIN_MODE_API == STD_ON)\r
+void Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode) {\r
+       uint8 port = GET_PIN_PORT(Pin);\r
+       uint8 pin = GET_PIN_PIN(Pin);\r
+       uint32 mask = GET_PIN_MASK(Pin);\r
+/*\r
+    Port_PinType pin  = Pin & 0x1F;\r
+    Port_PinType port = Pin >> 8;\r
+    Port_PinType mask = 1 << pin;\r
+*/\r
+    Port_Base[port]->FUN &= ~mask;\r
+    Port_Base[port]->FUN |= ((Mode & 1) << pin);\r
+}\r
+#endif\r

diff --git a/boards/ti_tms570ls/build_config.mk b/boards/ti_tms570ls/build_config.mk
index 0d1aa275d05385656fa8ca1c0866840930cbf9cb..9c3ffd6a0a98a34d93c98cca64acc462812a3300 100644 (file)
--- a/boards/ti_tms570ls/build_config.mk
+++ b/boards/ti_tms570ls/build_config.mk
@@ -27,7 +27,7 @@ CFG+=STM32_CL
 \r
 MOD_AVAIL+=MCU\r
 # System + Communication + Diagnostic\r
-MOD_AVAIL+=CANIF CANTP COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM RTE CAN\r
+MOD_AVAIL+=CANIF CANTP COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM RTE CAN PORT DIO\r
 # Additional\r
 MOD_AVAIL+=RAMLOG \r
 \r

diff --git a/boards/ti_tms570ls/config/Port_Cfg.c b/boards/ti_tms570ls/config/Port_Cfg.c
new file mode 100644 (file)
index 0000000..f0f4307
--- /dev/null
+++ b/boards/ti_tms570ls/config/Port_Cfg.c
@@ -0,0 +1,65 @@
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ *           on Fri Dec 10 07:52:22 CET 2010\r
+ */\r
+\r
+       \r
+\r
+#include "Port.h"\r
+\r
+\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+    .pins = {\r
+       {\r
+                       .pin = PORT_PIN_DCAN1_TX,\r
+                       .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_DCAN1_RX,\r
+                       .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_DCAN2_TX,\r
+                       .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_DCAN2_RX,\r
+                       .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_DCAN3_TX,\r
+                       .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_DCAN3_RX,\r
+                       .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_GIOA0,\r
+                       .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_GIOA3,\r
+                       .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_GIOA4,\r
+                       .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+               },                       \r
+       {\r
+                       .pin = PORT_PIN_GIOA5,\r
+                       .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+               },                        \r
+    }\r
+};\r

diff --git a/boards/ti_tms570ls/config/Port_Cfg.h b/boards/ti_tms570ls/config/Port_Cfg.h
new file mode 100644 (file)
index 0000000..57454dd
--- /dev/null
+++ b/boards/ti_tms570ls/config/Port_Cfg.h
@@ -0,0 +1,77 @@
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ *           on Fri Dec 10 07:52:22 CET 2010\r
+ */\r
+\r
+
+#if (PORT_SW_MAJOR_VERSION != 1) 
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+\r
+/** Build version info API */\r
+#define PORT_VERSION_INFO_API                          STD_ON\r
+/** Enable Development Error Trace */\r
+#define PORT_DEV_ERROR_DETECT                          STD_ON\r
+/** Build change pin direction API */\r
+#define PORT_SET_PIN_DIRECTION_API             STD_ON\r
+/** Allow Pin mode changes during runtime */\r
+#define PORT_SET_PIN_MODE_API               STD_ON\r
+\r
+#define PORT_NUMBER_OF_PINS    10\r
+\r
+#define PORT_FUNC              (1 << 1)\r
+#define PORT_FUNC_NO   (0 << 1)\r
+#define PORT_PULL_NONE (1 << 2)\r
+#define PORT_PULL_UP   (1 << 3)\r
+#define PORT_PULL_DOWN (0 << 3)\r
+#define PORT_ODE_ENABLE        (1 << 4)\r
+\r
+/** HW specific symbolic names of pins */\r
+/** @req PORT013 */\r
+typedef enum\r
+{\r
+       PORT_PIN_DCAN1_TX = 0x0800,\r
+       PORT_PIN_DCAN1_RX = 0x0801,\r
+       PORT_PIN_DCAN2_TX = 0x0900,\r
+       PORT_PIN_DCAN2_RX = 0x0901,\r
+       PORT_PIN_DCAN3_TX = 0x0a00,\r
+       PORT_PIN_DCAN3_RX = 0x0a01,\r
+       PORT_PIN_GIOA0 = 0x0000,\r
+       PORT_PIN_GIOA3 = 0x0003,\r
+       PORT_PIN_GIOA4 = 0x0004,\r
+       PORT_PIN_GIOA5 = 0x0005,  \r
+} Port_PinType;\r
+\r
+typedef struct {\r
+       Port_PinType pin;\r
+       uint8 conf;\r
+} Port_ConfiguredPinType;\r
+\r
+/** Top level configuration container */\r
+/** @req PORT073 */\r
+typedef struct\r
+{\r
+  const Port_ConfiguredPinType pins[PORT_NUMBER_OF_PINS];\r
+} Port_ConfigType;\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+\r
+#endif /*PORT_CFG_H_*/\r