]> rtime.felk.cvut.cz Git - arc.git/commitdiff
Updated installation of ISRs in mpc55xx drivers
authortojo <devnull@localhost>
Wed, 23 Mar 2011 08:35:21 +0000 (09:35 +0100)
committertojo <devnull@localhost>
Wed, 23 Mar 2011 08:35:21 +0000 (09:35 +0100)
arch/ppc/mpc55xx/drivers/Adc.c
arch/ppc/mpc55xx/drivers/Can.c
arch/ppc/mpc55xx/drivers/Gpt.c
arch/ppc/mpc55xx/drivers/Lin.c
arch/ppc/mpc55xx/drivers/Pwm.c
arch/ppc/mpc55xx/drivers/sys_tick.c
include/isr.h
makefile
scripts/rules.install
scripts/rules.mk

index 35eae1053dd5fc800148a43297b921ccaafb2649..76bedbb89f3b5afb6054cbedd0a84fd8c3e7ca94 100644 (file)
@@ -702,31 +702,11 @@ void Adc_ConfigureEQADCInterrupts (void)
 {\r
   Adc_GroupType group;\r
 \r
-#if defined(USE_KERNEL)\r
-  TaskType tid;\r
-  tid = Os_Arc_CreateIsr(Adc_EQADCError,EQADC_FISR_OVER_PRIORITY,"Adc_Err");\r
-  Irq_AttachIsr2(tid,NULL,EQADC_FISR_OVER);\r
-\r
-  tid = Os_Arc_CreateIsr(Adc_Group0ConversionComplete,EQADC_FIFO0_END_OF_QUEUE_PRIORITY,"Adc_Grp0");\r
-  Irq_AttachIsr2(tid,NULL,EQADC_FISR0_EOQF0);\r
+  ISR_INSTALL_ISR2( "Adc_Err",  Adc_EQADCError,               EQADC_FISR_OVER,   EQADC_FISR_OVER_PRIORITY,          0 );\r
+  ISR_INSTALL_ISR2( "Adc_Grp0", Adc_Group0ConversionComplete, EQADC_FISR0_EOQF0, EQADC_FIFO0_END_OF_QUEUE_PRIORITY, 0 );\r
+  ISR_INSTALL_ISR2( "Adc_Grp1", Adc_Group1ConversionComplete, EQADC_FISR1_EOQF1, EQADC_FIFO1_END_OF_QUEUE_PRIORITY, 0 );\r
 \r
-  tid = Os_Arc_CreateIsr(Adc_Group1ConversionComplete,EQADC_FIFO1_END_OF_QUEUE_PRIORITY,"Adc_Grp1");\r
-  Irq_AttachIsr2(tid,NULL,EQADC_FISR1_EOQF1);\r
-\r
-#else\r
-  Irq_InstallVector (Adc_EQADCError,\r
-                            EQADC_FISR_OVER,\r
-                            EQADC_FISR_OVER_PRIORITY, CPU_Z1);\r
 \r
-  Irq_InstallVector (Adc_Group0ConversionComplete,\r
-                          EQADC_FISR0_EOQF0,\r
-                          EQADC_FIFO0_END_OF_QUEUE_PRIORITY, CPU_Z1);\r
-\r
-  Irq_InstallVector (Adc_Group1ConversionComplete,\r
-                          EQADC_FISR1_EOQF1,\r
-                          EQADC_FIFO1_END_OF_QUEUE_PRIORITY, CPU_Z1);\r
-\r
-#endif\r
   for (group = ADC_GROUP0; group < AdcConfigPtr->nbrOfGroups; group++)\r
   {\r
     /* Enable end of queue, queue overflow/underflow interrupts. Clear corresponding flags. */\r
index 98fbc704dc83998f4750724206c2801b5742ac59..3676a370bc5cc9664e576a68a9351f7439c2ad26 100644 (file)
 \r
 #define GET_CONTROLLER_CNT() (CAN_CONTROLLER_CNT)\r
 \r
-#if 0\r
-#define _INSTALL_HANDLER(_can_entry, _unique, _vector,_priority,_app )        \\r
+#define INSTALL_HANDLER4(_name, _can_entry, _vector, _priority, _app)\\r
        do { \\r
-         const OsIsrConstType _can_entry ## _unique = { \\r
-                       .vector = _vector,   \\r
-                       .type = ISR_TYPE_2, \\r
-                       .priority = _priority,      \\r
-                       .entry = _can_entry,      \\r
-                       .name = "Can",      \\r
-                       .resourceMask = 0,  \\r
-                       .timingProtPtr = NULL, \\r
-                       .appOwner = _app,      \\r
-                 };                    \\r
-         Os_IsrAdd( & _can_entry ## _unique);   \\r
-       } while(0);\r
-#endif\r
+               ISR_INSTALL_ISR2(_name, _can_entry, _vector+0, _priority, _app); \\r
+               ISR_INSTALL_ISR2(_name, _can_entry, _vector+1, _priority, _app); \\r
+               ISR_INSTALL_ISR2(_name, _can_entry, _vector+2, _priority, _app); \\r
+               ISR_INSTALL_ISR2(_name, _can_entry, _vector+3, _priority, _app); \\r
+       } while(0)\r
 \r
-#define INSTALL_HANDLER4(_name,_can_entry, _vector,_priority,_app)\\r
-               ISR_INSTALL_ISR2(_name,_can_entry, _vector+0,_priority,_app) \\r
-               ISR_INSTALL_ISR2(_name,_can_entry, _vector+1,_priority,_app) \\r
-               ISR_INSTALL_ISR2(_name,_can_entry, _vector+2,_priority,_app) \\r
-               ISR_INSTALL_ISR2(_name,_can_entry, _vector+3,_priority,_app)\r
-\r
-#define INSTALL_HANDLER16(_name,_can_entry, _vector,_priority,_app)\\r
-               INSTALL_HANDLER4(_name,_can_entry, _vector+0,_priority,_app) \\r
-               INSTALL_HANDLER4(_name,_can_entry, _vector+4,_priority,_app) \\r
-               INSTALL_HANDLER4(_name,_can_entry, _vector+8,_priority,_app) \\r
-               INSTALL_HANDLER4(_name,_can_entry, _vector+12,_priority,_app)\r
+#define INSTALL_HANDLER16(_name, _can_entry, _vector, _priority, _app)\\r
+       do { \\r
+               INSTALL_HANDLER4(_name, _can_entry, _vector+0, _priority, _app); \\r
+               INSTALL_HANDLER4(_name, _can_entry, _vector+4, _priority, _app); \\r
+               INSTALL_HANDLER4(_name, _can_entry, _vector+8, _priority, _app); \\r
+               INSTALL_HANDLER4(_name, _can_entry, _vector+12,_priority, _app); \\r
+       } while(0)\r
 \r
 \r
 //-------------------------------------------------------------------\r
index 0a2df55fa9cb52b985d10e8bdb44d7b806c17b73..5f03f2fe3fc6a76b7e45588087b1f383b980295c 100644 (file)
@@ -144,13 +144,6 @@ GPT_ISR( 6 );
 GPT_ISR( 7 );\r
 GPT_ISR( 8 );\r
 \r
-#define GPT_ISR_INSTALL( _channel, _prio )                                                                                                     \\r
-{                                                                                                                                                                      \\r
-       TaskType tid;                                                                                                                                   \\r
-       tid = Os_Arc_CreateIsr(Gpt_Isr_Channel##_channel, _prio, XSTR__(Gpt_##_channel));       \\r
-       Irq_AttachIsr2(tid, NULL, PIT_PITFLG_RTIF + _channel);                                                  \\r
-}\r
-\r
 //-------------------------------------------------------------------\r
 \r
 void Gpt_Init(const Gpt_ConfigType *config)\r
@@ -187,15 +180,16 @@ void Gpt_Init(const Gpt_ConfigType *config)
       {\r
         switch( ch )\r
         {\r
-          case 0: GPT_ISR_INSTALL( 0, cfg->GptNotificationPriority ); break;\r
-          case 1: GPT_ISR_INSTALL( 1, cfg->GptNotificationPriority ); break;\r
-          case 2: GPT_ISR_INSTALL( 2, cfg->GptNotificationPriority ); break;\r
-          case 3: GPT_ISR_INSTALL( 3, cfg->GptNotificationPriority ); break;\r
-          case 4: GPT_ISR_INSTALL( 4, cfg->GptNotificationPriority ); break;\r
-          case 5: GPT_ISR_INSTALL( 5, cfg->GptNotificationPriority ); break;\r
-          case 6: GPT_ISR_INSTALL( 6, cfg->GptNotificationPriority ); break;\r
-          case 7: GPT_ISR_INSTALL( 7, cfg->GptNotificationPriority ); break;\r
-          case 8: GPT_ISR_INSTALL( 8, cfg->GptNotificationPriority ); break;\r
+          // TODO: What to do with cfg->GptNotificationPriority ?\r
+          case 0: ISR_INSTALL_ISR2( "Gpt_0", Gpt_Isr_Channel0, PIT_PITFLG_RTIF, 2, 0 ); break;\r
+          case 1: ISR_INSTALL_ISR2( "Gpt_1", Gpt_Isr_Channel1, PIT_PITFLG_PIT1, 2, 0 ); break;\r
+          case 2: ISR_INSTALL_ISR2( "Gpt_2", Gpt_Isr_Channel2, PIT_PITFLG_PIT2, 2, 0 ); break;\r
+          case 3: ISR_INSTALL_ISR2( "Gpt_3", Gpt_Isr_Channel3, PIT_PITFLG_PIT3, 2, 0 ); break;\r
+          case 4: ISR_INSTALL_ISR2( "Gpt_4", Gpt_Isr_Channel4, PIT_PITFLG_PIT4, 2, 0 ); break;\r
+          case 5: ISR_INSTALL_ISR2( "Gpt_5", Gpt_Isr_Channel5, PIT_PITFLG_PIT5, 2, 0 ); break;\r
+          case 6: ISR_INSTALL_ISR2( "Gpt_6", Gpt_Isr_Channel6, PIT_PITFLG_PIT6, 2, 0 ); break;\r
+          case 7: ISR_INSTALL_ISR2( "Gpt_7", Gpt_Isr_Channel7, PIT_PITFLG_PIT7, 2, 0 ); break;\r
+          case 8: ISR_INSTALL_ISR2( "Gpt_8", Gpt_Isr_Channel8, PIT_PITFLG_PIT8, 2, 0 ); break;\r
           default:\r
           {\r
             // Unknown PIT channel.\r
@@ -205,15 +199,6 @@ void Gpt_Init(const Gpt_ConfigType *config)
         }\r
       }\r
     }\r
-#if defined(USE_KERNEL)\r
-    // Don't install if we use kernel.. it handles that.\r
-#else\r
-    else if (ch == GPT_CHANNEL_DEC)\r
-    {\r
-      // Decrementer event is default an exception. Use software interrupt 7 as wrapper.\r
-      Irq_InstallVector(config[i].GptNotification, INTC_SSCIR0_CLR7, 1, CPU_Z1);\r
-    }\r
-#endif\r
 \r
     cfg++;\r
     i++;\r
index b539829c3233ee5618b0c1b58244bc6bfe194818..e574da427d54045fda86de2d0e1cf081554b06e5 100644 (file)
@@ -262,14 +262,6 @@ static void LinInterruptH()
        LinInterrupt(LIN_CTRL_H);\r
 }\r
 \r
-static const void const * aIntFnc[] =  {LinInterruptA,\r
-                                                                               LinInterruptB,\r
-                                                                               LinInterruptC,\r
-                                                                               LinInterruptD,\r
-                                                                               LinInterruptE,\r
-                                                                               LinInterruptF,\r
-                                                                               LinInterruptG,\r
-                                                                               LinInterruptH,};\r
 \r
 void Lin_Init( const Lin_ConfigType* Config )\r
 {\r
@@ -330,26 +322,18 @@ void Lin_InitChannel(  uint8 Channel,   const Lin_ChannelConfigType* Config )
        VALIDATE( (LinDriverStatus != LIN_UNINIT), LIN_INIT_CHANNEL_SERVICE_ID, LIN_E_UNINIT );\r
        VALIDATE( (Channel < LIN_CONTROLLER_CNT), LIN_INIT_CHANNEL_SERVICE_ID, LIN_E_INVALID_CHANNEL );\r
 \r
+\r
        // Install the interrupt\r
-       if (Channel > 3)\r
-       {\r
-#if defined(USE_KERNEL)\r
-               TaskType tid;\r
-               tid = Os_Arc_CreateIsr(aIntFnc[Channel],LIN_PRIO,"Lin");\r
-               Irq_AttachIsr2(tid,NULL,SCI_E_COMB + Channel);\r
-#else\r
-         Irq_InstallVector(aIntFnc[Channel],SCI_E_COMB + Channel,LIN_PRIO,CPU_Z1);\r
-#endif\r
-       }\r
-       else\r
-       {\r
-#if defined(USE_KERNEL)\r
-               TaskType tid;\r
-               tid = Os_Arc_CreateIsr(aIntFnc[Channel],LIN_PRIO,"Lin");\r
-               Irq_AttachIsr2(tid,NULL,SCI_A_COMB + Channel);\r
-#else\r
-         Irq_InstallVector(aIntFnc[Channel],SCI_A_COMB + Channel,LIN_PRIO,CPU_Z1);\r
-#endif\r
+       switch (Channel) {\r
+               case 0: ISR_INSTALL_ISR2( "LinA", LinInterruptA, SCI_A_COMB, LIN_PRIO, 0 ); break;\r
+               case 1: ISR_INSTALL_ISR2( "LinB", LinInterruptB, SCI_B_COMB, LIN_PRIO, 0 ); break;\r
+               case 2: ISR_INSTALL_ISR2( "LinC", LinInterruptC, SCI_C_COMB, LIN_PRIO, 0 ); break;\r
+               case 3: ISR_INSTALL_ISR2( "LinD", LinInterruptD, SCI_D_COMB, LIN_PRIO, 0 ); break;\r
+               case 4: ISR_INSTALL_ISR2( "LinE", LinInterruptE, SCI_E_COMB, LIN_PRIO, 0 ); break;\r
+               case 5: ISR_INSTALL_ISR2( "LinF", LinInterruptF, SCI_F_COMB, LIN_PRIO, 0 ); break;\r
+               case 6: ISR_INSTALL_ISR2( "LinG", LinInterruptG, SCI_G_COMB, LIN_PRIO, 0 ); break;\r
+               case 7: ISR_INSTALL_ISR2( "LinH", LinInterruptH, SCI_H_COMB, LIN_PRIO, 0 ); break;\r
+               default: assert(0); break;\r
        }\r
 \r
        esciHw->CR2.B.MDIS = 0;/* The module is enabled by writing the ESCIx_CR2[MDIS] bit to 0. */\r
index 161aa5a03d6663fabf148c92df522d1cf583e212..532b4aff5793453eae01b85c954fa4a5bf7de77e 100644 (file)
@@ -119,11 +119,6 @@ void Pwm_Init(const Pwm_ConfigType* ConfigPtr) {
         #endif\r
     #endif\r
 \r
-    #if PWM_NOTIFICATION_SUPPORTED==STD_ON\r
-        // Create a task for our interrupt service routine.\r
-        TaskType tid = Os_Arc_CreateIsr(Pwm_Isr, PWM_ISR_PRIORITY /*prio*/, "PwmIsr");\r
-    #endif\r
-\r
     /* Clock scaler uses system clock (~64MHz) as source, so prescaler 64 => 1MHz. */\r
     EMIOS.MCR.B.GPRE = PWM_PRESCALER - 1;\r
 \r
@@ -155,7 +150,26 @@ void Pwm_Init(const Pwm_ConfigType* ConfigPtr) {
                 // Pwm_DisableNotification(channel);\r
 \r
                 // Install ISR\r
-                Irq_AttachIsr2(tid, NULL, EMISOS200_FLAG_F0 + channel);\r
+                switch (channel) {\r
+                                       case 0x0: ISR_INSTALL_ISR2( "Pwm0",  Pwm_Isr, EMISOS200_FLAG_F0,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x1: ISR_INSTALL_ISR2( "Pwm1",  Pwm_Isr, EMISOS200_FLAG_F1,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x2: ISR_INSTALL_ISR2( "Pwm2",  Pwm_Isr, EMISOS200_FLAG_F2,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x3: ISR_INSTALL_ISR2( "Pwm3",  Pwm_Isr, EMISOS200_FLAG_F3,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x4: ISR_INSTALL_ISR2( "Pwm4",  Pwm_Isr, EMISOS200_FLAG_F4,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x5: ISR_INSTALL_ISR2( "Pwm5",  Pwm_Isr, EMISOS200_FLAG_F5,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x6: ISR_INSTALL_ISR2( "Pwm6",  Pwm_Isr, EMISOS200_FLAG_F6,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x7: ISR_INSTALL_ISR2( "Pwm7",  Pwm_Isr, EMISOS200_FLAG_F7,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x8: ISR_INSTALL_ISR2( "Pwm8",  Pwm_Isr, EMISOS200_FLAG_F8,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0x9: ISR_INSTALL_ISR2( "Pwm9",  Pwm_Isr, EMISOS200_FLAG_F9,  PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0xA: ISR_INSTALL_ISR2( "Pwm10", Pwm_Isr, EMISOS200_FLAG_F10, PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0xB: ISR_INSTALL_ISR2( "Pwm11", Pwm_Isr, EMISOS200_FLAG_F11, PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0xC: ISR_INSTALL_ISR2( "Pwm12", Pwm_Isr, EMISOS200_FLAG_F12, PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0xD: ISR_INSTALL_ISR2( "Pwm13", Pwm_Isr, EMISOS200_FLAG_F13, PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0xE: ISR_INSTALL_ISR2( "Pwm14", Pwm_Isr, EMISOS200_FLAG_F14, PWM_ISR_PRIORITY, 0 ); break;\r
+                                       case 0xF: ISR_INSTALL_ISR2( "Pwm15", Pwm_Isr, EMISOS200_FLAG_F15, PWM_ISR_PRIORITY, 0 ); break;\r
+                                       default: assert(0); break;\r
+                               }\r
+\r
                 ChannelRuntimeStruct[channel].NotificationRoutine\r
                         = ConfigPtr->NotificationHandlers[channel_iterator];\r
         #endif\r
index ef81dddbe74f90b7442df0c67eb269ed31b28e3d..10177f16672119f8b18e78f3c3e762be96b4564b 100644 (file)
 #include "internal.h"\r
 #include "isr.h"\r
 #include "arc.h"\r
+#include "irq_types.h"\r
 \r
 /**\r
  * Init of free running timer.\r
  */\r
 void Os_SysTickInit( void ) {\r
 \r
-       ISR_INSTALL_ISR2("OsTick",OsTick,7,6,0);\r
+       ISR_INSTALL_ISR2( "OsTick", OsTick, INTC_SSCIR0_CLR7, 6, 0 );\r
 \r
 //     TaskType tid;\r
 \r
@@ -35,7 +36,7 @@ void Os_SysTickInit( void ) {
        IRQ_ATTACH(7);\r
 \r
 // else\r
-       tid = Os_Arc_CreateIsr(OsTick,6/*prio*/,"OsTick");\r
+       tid = ISR_INSTALL_ISR2( "OsTick", OsTick, _vector, 6/*prio*/, 0 );\r
        Irq_AttachIsr2(tid,NULL,7);\r
 #endif\r
 }\r
index 22646c41164d47d59520fd812bb45c617f7e1298..90ad553b0150187a2915036c2d0fb6f7d3eebeac 100644 (file)
 #define ISR_TYPE_2                     1\r
 \r
 /* ----------------------------[macro]---------------------------------------*/\r
-#define ISR_DECLARE_ISR2(_name, _entry, _unique, _vector,_priority,_app )        \\r
+#define ISR_DECLARE_ISR2( _name, _entry, _unique, _vector, _priority, _app )        \\r
          const OsIsrConstType _entry ## _unique = { \\r
-                       .vector = _vector,   \\r
-                       .type = ISR_TYPE_2, \\r
-                       .priority = _priority,      \\r
-                       .entry = _entry,      \\r
-                       .name = _name,      \\r
-                       .resourceMask = 0,  \\r
-                       .timingProtPtr = NULL, \\r
-                       .appOwner = _app,      \\r
-                 };                    \\r
-\r
-#define _ISR_INSTALL_ISR2(_name, _entry, _unique, _vector,_priority,_app )        \\r
-       do { \\r
+                       .vector =          _vector,       \\r
+                       .type =             ISR_TYPE_2,   \\r
+                       .priority =        _priority,     \\r
+                       .entry =           _entry,        \\r
+                       .name =            _name,         \\r
+                       .resourceMask =     0,            \\r
+                       .timingProtPtr =    NULL,         \\r
+                       .appOwner =        _app,          \\r
+                 }\r
+\r
+#define _ISR_INSTALL_ISR2( _name, _entry, _unique, _vector, _priority, _app )        \\r
+       do {                                         \\r
          const OsIsrConstType _entry ## _unique = { \\r
-                       .vector = _vector,   \\r
-                       .type = ISR_TYPE_2, \\r
-                       .priority = _priority,      \\r
-                       .entry = _entry,      \\r
-                       .name = _name,      \\r
-                       .resourceMask = 0,  \\r
-                       .timingProtPtr = NULL, \\r
-                       .appOwner = _app,      \\r
-                 };                    \\r
-         Os_IsrAdd( & _entry ## _unique);   \\r
-       } while(0);\r
-\r
-#define ISR_INSTALL_ISR2(_name,_entry, _vector,_priority,_app)        \\r
-               _ISR_INSTALL_ISR2(_name,_entry, __LINE__, _vector,_priority,_app)\r
+                       .vector =          _vector,       \\r
+                       .type =             ISR_TYPE_2,   \\r
+                       .priority =        _priority,     \\r
+                       .entry =           _entry,        \\r
+                       .name =            _name,         \\r
+                       .resourceMask =     0,            \\r
+                       .timingProtPtr =    NULL,         \\r
+                       .appOwner =        _app,          \\r
+                 };                                  \\r
+         Os_IsrAdd( & _entry ## _unique);        \\r
+       } while(0)\r
+\r
+#define ISR_INSTALL_ISR2( _name, _entry, _vector, _priority, _app )        \\r
+               _ISR_INSTALL_ISR2( _name, _entry, __LINE__, _vector, _priority, _app )\r
 \r
 \r
 /* ----------------------------[typedef]-------------------------------------*/\r
index 7ae0e60bda3a679c1d314fe21528d8b6f9880188..2af6b8deb17202f9e37b2bc0312820db060ce502 100644 (file)
--- a/makefile
+++ b/makefile
@@ -161,7 +161,7 @@ clean_all:
        $(Q)find . -type d -name obj_* | xargs rm -rf\r
        $(Q)find . -type f -name *.a | xargs rm -rf\r
        @echo\r
-       @echo "  >>>>>>>  DONE  <<<<<<<<<"\r
+       @echo "  >>>>>>>>>  DONE  <<<<<<<<<"\r
        @echo\r
        \r
 config: $(dir_cmd_goals)       \r
@@ -174,7 +174,7 @@ clean: $(dir_cmd_goals)
        $(Q)find . -type f -name *.a| xargs rm -rf\r
        $(Q)rm   -rf libs/*\r
        @echo\r
-       @echo "  >>>>>>>  DONE  <<<<<<<<<"\r
+       @echo "  >>>>>>>>>  DONE  <<<<<<<<<"\r
        @echo\r
 \r
                \r
index ded59c62540fef20a962b122ccf197c34d5dada5..22a5ef5b013d1021241b2d81ef764387429923e7 100644 (file)
@@ -60,5 +60,5 @@ $(build-lib-y): $(dep-y) $(obj-y)
 $(build-exe-y): $(obj-y) $(sim-y) $(libitem-y)\r
        @echo "  >> LD $(RELDIR)/$@"   \r
        $(LD) $(LDFLAGS) $(ldcmdfile-y) -o $@ $(obj-y) $(libpath-y) --start-group $(lib-y) $(libitem-y) --end-group $(LDMAPFILE)\r
-       @echo "  >>>>>>>  DONE  <<<<<<<<<"\r
+       @echo "  >>>>>>>>>  DONE  <<<<<<<<<"\r
        
\ No newline at end of file
index 22a9fd016956cacb09abc23871022701aaae792a..56b9bdd3d1e4d556ecad3e8b303d95118582d7ad 100644 (file)
@@ -276,8 +276,6 @@ $(build-exe-y): $(dep-y) $(obj-y) $(sim-y) $(libitem-y) $(ldcmdfile-y)
 ifeq ($(CROSS_COMPILE),)\r
        $(Q)$(CC) $(LDFLAGS) -o $@ $(libpath-y) $(obj-y) $(lib-y) $(libitem-y)  \r
 else\r
-       @echo LDFLAGS $(LDFLAGS)\r
-       @echo LD_FILE  $(LD_FILE)\r
        $(Q)$(LD) $(LDFLAGS) $(LD_FILE) $(ldcmdfile-y) -o $@ $(libpath-y) $(LD_START_GRP) $(obj-y) $(lib-y) $(libitem-y) $(LD_END_GRP) $(LDMAPFILE)\r
  ifdef CFG_MC912DG128A\r
     # Print memory layout\r