1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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17 /* ----------------------------[includes]------------------------------------*/
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20 #include "Std_Types.h"
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23 #if defined(USE_DEM)
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26 #include "mpc55xx.h"
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32 /* ----------------------------[private define]------------------------------*/
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33 //#define USE_TRACE 1
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34 //#define USE_LDEBUG_PRINTF 1
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37 #define SYSCLOCK_SELECT_PLL 0x2
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39 /* ----------------------------[private macro]-------------------------------*/
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41 #if defined(CFG_MPC5567)
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42 #define CALC_SYSTEM_CLOCK(_extal,_emfd,_eprediv,_erfd) \
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43 ( (_extal) * ((_emfd)+4) / (((_eprediv)+1)*(1<<(_erfd))) )
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45 #define CALC_SYSTEM_CLOCK(_extal,_emfd,_eprediv,_erfd) \
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46 ( (_extal) * ((_emfd)+16) / (((_eprediv)+1)*((_erfd)+1)) )
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49 /* Development error macros. */
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50 #if ( MCU_DEV_ERROR_DETECT == STD_ON )
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51 #define VALIDATE(_exp,_api,_err ) \
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53 Det_ReportError(MODULE_ID_MCU,0,_api,_err); \
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57 #define VALIDATE_W_RV(_exp,_api,_err,_rv ) \
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59 Det_ReportError(MODULE_ID_MCU,0,_api,_err); \
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63 #define VALIDATE(_exp,_api,_err )
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64 #define VALIDATE_W_RV(_exp,_api,_err,_rv )
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68 /* ----------------------------[private typedef]-----------------------------*/
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69 typedef void (*vfunc_t)();
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72 uint32 lossOfLockCnt;
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73 uint32 lossOfClockCnt;
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77 * Type that holds all global data for Mcu
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81 // Set if Mcu_Init() have been called
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85 const Mcu_ConfigType *config;
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87 Mcu_ClockType clockSetting;
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94 /* ----------------------------[private function prototypes]-----------------*/
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95 static void Mcu_ConfigureFlash(void);
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96 /* ----------------------------[private variables]---------------------------*/
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99 Mcu_GlobalType Mcu_Global =
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102 .config = &McuConfigData[0],
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105 /* ----------------------------[private functions]---------------------------*/
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106 /* ----------------------------[public functions]----------------------------*/
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112 static void Mcu_LossOfLock( void ) {
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113 #if defined(USE_DEM)
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114 Dem_ReportErrorStatus(MCU_E_CLOCK_FAILURE, DEM_EVENT_STATUS_FAILED);
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117 Mcu_Global.stats.lossOfLockCnt++;
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119 FMPLL.SYNSR.B.LOLF = 1;
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126 static void Mcu_LossOfClock( void ) {
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128 /* Should report MCU_E_CLOCK_FAILURE with DEM here */
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130 Mcu_Global.stats.lossOfClockCnt++;
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132 FMPLL.SYNSR.B.LOCF = 1;
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136 #define SPR_PIR 286
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137 #define SPR_PVR 287
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139 #define CORE_PVR_E200Z1 0x81440000UL
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140 #define CORE_PVR_E200Z0 0x81710000UL
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141 #define CORE_PVR_E200Z3 0x81120000UL
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142 #define CORE_PVR_E200Z6 0x81170000UL
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155 cpu_info_t cpu_info_list[] =
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157 #if defined(CFG_MPC5516)
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160 .pvr = CORE_PVR_E200Z1,
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164 .pvr = CORE_PVR_E200Z0,
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166 #elif defined(CFG_MPC5567)
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169 .pvr = CORE_PVR_E200Z6,
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171 #elif defined(CFG_MPC5633)
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174 .pvr = CORE_PVR_E200Z3,
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179 core_info_t core_info_list[] = {
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180 #if defined(CFG_MPC5516)
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182 .name = "CORE_E200Z1",
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183 .pvr = CORE_PVR_E200Z1,
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186 .name = "CORE_E200Z1",
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187 .pvr = CORE_PVR_E200Z1,
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189 #elif defined(CFG_MPC5567)
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191 .name = "CORE_E200Z6",
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192 .pvr = CORE_PVR_E200Z6,
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194 #elif defined(CFG_MPC5633)
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196 .name = "CORE_E200Z3",
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197 .pvr = CORE_PVR_E200Z3,
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203 #if !defined(ARRAY_SIZE)
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204 #define ARRAY_SIZE(_x) (sizeof(_x)/sizeof((_x)[0]))
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207 static cpu_info_t *Mcu_IdentifyCpu(uint32 pvr)
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210 for (i = 0; i < ARRAY_SIZE(cpu_info_list); i++) {
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211 if (cpu_info_list[i].pvr == pvr) {
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212 return &cpu_info_list[i];
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219 static core_info_t *Mcu_IdentifyCore(uint32 pvr)
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222 for (i = 0; i < ARRAY_SIZE(core_info_list); i++) {
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223 if (core_info_list[i].pvr == pvr) {
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224 return &core_info_list[i];
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232 static uint32 Mcu_CheckCpu( void ) {
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236 cpu_info_t *cpuType;
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237 core_info_t *coreType;
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239 // We have to registers to read here, PIR and PVR
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241 pir = get_spr(SPR_PIR);
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242 pvr = get_spr(SPR_PVR);
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244 cpuType = Mcu_IdentifyCpu(pvr);
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245 coreType = Mcu_IdentifyCore(pvr);
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247 if( (cpuType == NULL) || (coreType == NULL) ) {
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252 //DEBUG(DEBUG_HIGH,"/drivers/mcu: Cpu: %s( 0x%08x )\n",cpuType->name,pvr);
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253 //DEBUG(DEBUG_HIGH,"/drivers/mcu: Core: %s( 0x%08x )\n",coreType->name,pvr);
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259 //-------------------------------------------------------------------
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261 void Mcu_Init(const Mcu_ConfigType *configPtr) {
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262 IRQ_DECL_ISR1( PLL_SYNSR_LOLF, CPU_CORE0, 10, Mcu_LossOfLock );
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263 IRQ_DECL_ISR1( PLL_SYNSR_LOCF, CPU_CORE0, 10, Mcu_LossOfClock );
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265 VALIDATE( ( NULL != configPtr ), MCU_INIT_SERVICE_ID, MCU_E_PARAM_CONFIG );
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267 if (!SIMULATOR()) {
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271 memset(&Mcu_Global.stats, 0, sizeof(Mcu_Global.stats));
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276 Mcu_ConfigureFlash();
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278 Mcu_Global.config = configPtr;
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279 Mcu_Global.initRun = 1;
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281 if (Mcu_Global.config->McuClockSrcFailureNotification == TRUE) {
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282 // Enable loss of lock interrupt
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284 Irq_Attach( &IRQ_NAME(PLL_SYNSR_LOLF) );
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285 // Irq_AttachIsr1(Mcu_LossOfLock, NULL, PLL_SYNSR_LOLF, 10);
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286 #if defined(CFG_MPC5516)
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287 FMPLL.ESYNCR2.B.LOLIRQ = 1;
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288 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)
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289 FMPLL.SYNCR.B.LOLIRQ = 1;
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292 Irq_Attach( &IRQ_NAME(PLL_SYNSR_LOLF));
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293 // Irq_AttachIsr1(Mcu_LossOfClock, NULL, PLL_SYNSR_LOCF, 10);
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294 #if defined(CFG_MPC5516)
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295 FMPLL.ESYNCR2.B.LOCIRQ = 1;
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296 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)
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297 FMPLL.SYNCR.B.LOCIRQ = 1;
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301 //-------------------------------------------------------------------
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305 Mcu_Global.initRun = FALSE; // Very simple Deinit. Should we do more?
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308 //-------------------------------------------------------------------
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309 Std_ReturnType Mcu_InitRamSection(const Mcu_RamSectionType RamSection)
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311 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_INITRAMSECTION_SERVICE_ID, MCU_E_UNINIT, E_NOT_OK );
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312 VALIDATE_W_RV( ( RamSection <= Mcu_Global.config->McuRamSectors ), MCU_INITRAMSECTION_SERVICE_ID, MCU_E_PARAM_RAMSECTION, E_NOT_OK );
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314 /* NOT SUPPORTED, reason: no support for external RAM */
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321 //-------------------------------------------------------------------
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323 Std_ReturnType Mcu_InitClock(const Mcu_ClockType ClockSetting)
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325 Mcu_ClockSettingConfigType *clockSettingsPtr;
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326 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_INITCLOCK_SERVICE_ID, MCU_E_UNINIT, E_NOT_OK );
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327 VALIDATE_W_RV( ( ClockSetting < Mcu_Global.config->McuClockSettings ), MCU_INITCLOCK_SERVICE_ID, MCU_E_PARAM_CLOCK, E_NOT_OK );
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329 Mcu_Global.clockSetting = ClockSetting;
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330 clockSettingsPtr = &Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting];
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333 // TODO: find out if the 5554 really works like the 5516 here
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334 // All three (16, 54, 67) used to run the same code here though, so i'm sticking it with 5516
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335 #if defined(CFG_MPC5516) || defined(CFG_MPC5554)
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337 * Fsys - System frequency ( CPU + all periperals? )
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339 * Fsys = EXTAL_FREQ *( (emfd+16) / ( (eprediv+1) * ( erfd+1 )) ) )
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342 assert((clockSettingsPtr->Pll2>=32) && (clockSettingsPtr->Pll2<=132));
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343 assert( (clockSettingsPtr->Pll1 != 6) &&
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344 (clockSettingsPtr->Pll1 != 8) &&
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345 (clockSettingsPtr->Pll1 < 10) );
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346 assert( clockSettingsPtr->Pll3 & 1); // Must be odd
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347 #elif defined(CFG_MPC5567)
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348 /* 5567 clock info:
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349 * Fsys = EXTAL_FREQ *( (emfd+4) / ( (eprediv+1) * ( 2^erfd )) ) )
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352 assert(clockSettingsPtr->Pll2 < 16);
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353 assert(clockSettingsPtr->Pll1 <= 4);
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354 assert(clockSettingsPtr->Pll3 < 8);
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358 #if defined(USE_LDEBUG_PRINTF)
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360 uint32 extal = Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].McuClockReferencePointFrequency;
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363 f_sys = CALC_SYSTEM_CLOCK( extal,
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364 clockSettingsPtr->Pll2,
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365 clockSettingsPtr->Pll1,
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366 clockSettingsPtr->Pll3 );
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368 //DEBUG(DEBUG_HIGH,"/drivers/mcu: F_sys will be:%08d Hz\n",f_sys);
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372 #if defined(CFG_MPC5516)
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373 // External crystal PLL mode.
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374 FMPLL.ESYNCR1.B.CLKCFG = 7; //TODO: Hur ställa detta för 5567?
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376 // Write pll parameters.
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377 FMPLL.ESYNCR1.B.EPREDIV = clockSettingsPtr->Pll1;
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378 FMPLL.ESYNCR1.B.EMFD = clockSettingsPtr->Pll2;
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379 FMPLL.ESYNCR2.B.ERFD = clockSettingsPtr->Pll3;
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381 // Connect SYSCLK to FMPLL
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382 SIU.SYSCLK.B.SYSCLKSEL = SYSCLOCK_SELECT_PLL;
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383 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)
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384 // Partially following the steps in MPC5567 RM..
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385 FMPLL.SYNCR.B.DEPTH = 0;
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386 FMPLL.SYNCR.B.LOLRE = 0;
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387 FMPLL.SYNCR.B.LOLIRQ = 0;
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389 FMPLL.SYNCR.B.PREDIV = clockSettingsPtr->Pll1;
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390 FMPLL.SYNCR.B.MFD = clockSettingsPtr->Pll2;
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391 FMPLL.SYNCR.B.RFD = clockSettingsPtr->Pll3;
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393 // Wait for PLL to sync.
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394 while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)
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397 FMPLL.SYNCR.B.LOLIRQ = 1;
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403 //-------------------------------------------------------------------
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405 void Mcu_DistributePllClock(void)
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407 VALIDATE( ( 1 == Mcu_Global.initRun ), MCU_DISTRIBUTEPLLCLOCK_SERVICE_ID, MCU_E_UNINIT );
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408 VALIDATE( ( FMPLL.SYNSR.B.LOCK == 1 ), MCU_DISTRIBUTEPLLCLOCK_SERVICE_ID, MCU_E_PLL_NOT_LOCKED );
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410 /* NOT IMPLEMENTED due to pointless function on this hardware */
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414 //-------------------------------------------------------------------
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416 Mcu_PllStatusType Mcu_GetPllStatus(void)
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418 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_GETPLLSTATUS_SERVICE_ID, MCU_E_UNINIT, MCU_PLL_STATUS_UNDEFINED );
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419 Mcu_PllStatusType rv;
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423 if ( !FMPLL.SYNSR.B.LOCK )
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425 rv = MCU_PLL_UNLOCKED;
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428 rv = MCU_PLL_LOCKED;
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433 /* We are running on instruction set simulator. PLL is then always in sync... */
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434 rv = MCU_PLL_LOCKED;
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440 //-------------------------------------------------------------------
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442 Mcu_ResetType Mcu_GetResetReason(void)
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446 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_GETRESETREASON_SERVICE_ID, MCU_E_UNINIT, MCU_RESET_UNDEFINED );
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448 if( SIU.RSR.B.SSRS ) {
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450 } else if( SIU.RSR.B.WDRS ) {
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451 rv = MCU_WATCHDOG_RESET;
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452 } else if( SIU.RSR.B.PORS || SIU.RSR.B.ERS ) {
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453 rv = MCU_POWER_ON_RESET;
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455 rv = MCU_RESET_UNDEFINED;
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461 //-------------------------------------------------------------------
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463 Mcu_RawResetType Mcu_GetResetRawValue(void)
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465 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_GETRESETREASON_SERVICE_ID, MCU_E_UNINIT, MCU_GETRESETRAWVALUE_UNINIT_RV );
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467 if( !Mcu_Global.initRun ) {
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468 return MCU_GETRESETRAWVALUE_UNINIT_RV;
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474 //-------------------------------------------------------------------
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476 #if ( MCU_PERFORM_RESET_API == STD_ON )
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477 void Mcu_PerformReset(void)
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479 VALIDATE( ( 1 == Mcu_Global.initRun ), MCU_PERFORMRESET_SERVICE_ID, MCU_E_UNINIT );
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482 SIU.SRCR.B.SSR = 1;
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487 //-------------------------------------------------------------------
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489 void Mcu_SetMode(const Mcu_ModeType McuMode)
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491 VALIDATE( ( 1 == Mcu_Global.initRun ), MCU_SETMODE_SERVICE_ID, MCU_E_UNINIT );
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492 // VALIDATE( ( McuMode <= Mcu_Global.config->McuNumberOfMcuModes ), MCU_SETMODE_SERVICE_ID, MCU_E_PARAM_MODE );
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495 /* NOT SUPPORTED */
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498 //-------------------------------------------------------------------
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501 * Get the system clock in Hz. It calculates the clock from the
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502 * different register settings in HW.
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504 uint32_t McuE_GetSystemClock(void)
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507 * System clock calculation
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509 * 5516 - f_sys = extal * (emfd+16) / ( (eprediv+1) * ( erfd+1 ));
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510 * 5567 - f_sys = extal * (emfd+4) / ( (eprediv+1) * ( 2^erfd ));
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511 * 563x - We run in legacy mode = 5567
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513 #if defined(CFG_MPC5516)
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514 uint32_t eprediv = FMPLL.ESYNCR1.B.EPREDIV;
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515 uint32_t emfd = FMPLL.ESYNCR1.B.EMFD;
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516 uint32_t erfd = FMPLL.ESYNCR2.B.ERFD;
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517 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567) || defined(CFG_MPC5633)
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518 uint32_t eprediv = FMPLL.SYNCR.B.PREDIV;
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519 uint32_t emfd = FMPLL.SYNCR.B.MFD;
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520 uint32_t erfd = FMPLL.SYNCR.B.RFD;
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523 uint32 extal = Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].McuClockReferencePointFrequency;
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525 f_sys = CALC_SYSTEM_CLOCK(extal,emfd,eprediv,erfd);
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530 imask_t McuE_EnterCriticalSection()
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532 uint32_t msr = get_msr();
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537 void McuE_ExitCriticalSection(uint32_t old_state)
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539 set_msr(old_state);
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543 * Get the peripheral clock in Hz for a specific device
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548 uint32_t McuE_GetPeripheralClock(McuE_PeriperalClock_t type)
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550 #if defined(CFG_MPC5567)
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551 // No peripheral dividers on 5567.
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552 return McuE_GetSystemClock();
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554 uint32_t sysClock = McuE_GetSystemClock();
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555 vuint32_t prescaler;
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558 // See table 3.1, section 3.4.5 Peripheral Clock dividers
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561 case PERIPHERAL_CLOCK_FLEXCAN_A:
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562 case PERIPHERAL_CLOCK_DSPI_A:
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563 #if defined(CFG_MPC5516)
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564 prescaler = SIU.SYSCLK.B.LPCLKDIV0;
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568 case PERIPHERAL_CLOCK_PIT:
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569 case PERIPHERAL_CLOCK_ESCI_A:
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570 case PERIPHERAL_CLOCK_IIC_A:
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571 #if defined(CFG_MPC5516)
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572 prescaler = SIU.SYSCLK.B.LPCLKDIV1;
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576 case PERIPHERAL_CLOCK_FLEXCAN_B:
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577 case PERIPHERAL_CLOCK_FLEXCAN_C:
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578 case PERIPHERAL_CLOCK_FLEXCAN_D:
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579 case PERIPHERAL_CLOCK_FLEXCAN_E:
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580 case PERIPHERAL_CLOCK_FLEXCAN_F:
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581 #if defined(CFG_MPC5516)
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582 prescaler = SIU.SYSCLK.B.LPCLKDIV2;
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586 case PERIPHERAL_CLOCK_DSPI_B:
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587 case PERIPHERAL_CLOCK_DSPI_C:
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588 case PERIPHERAL_CLOCK_DSPI_D:
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589 #if defined(CFG_MPC5516)
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590 prescaler = SIU.SYSCLK.B.LPCLKDIV3;
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594 case PERIPHERAL_CLOCK_ESCI_B:
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595 case PERIPHERAL_CLOCK_ESCI_C:
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596 case PERIPHERAL_CLOCK_ESCI_D:
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597 case PERIPHERAL_CLOCK_ESCI_E:
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598 case PERIPHERAL_CLOCK_ESCI_F:
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599 case PERIPHERAL_CLOCK_ESCI_G:
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600 case PERIPHERAL_CLOCK_ESCI_H:
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601 #if defined(CFG_MPC5516)
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602 prescaler = SIU.SYSCLK.B.LPCLKDIV4;
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606 case PERIPHERAL_CLOCK_EMIOS:
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607 #if defined(CFG_MPC5516)
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608 prescaler = SIU.SYSCLK.B.LPCLKDIV5;
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612 case PERIPHERAL_CLOCK_MLB:
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613 #if defined(CFG_MPC5516)
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614 prescaler = SIU.SYSCLK.B.LPCLKDIV6;
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623 return sysClock/(1<<prescaler);
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629 * Function to setup the internal flash for optimal performance
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632 static void Mcu_ConfigureFlash(void)
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634 /* These flash settings increases the CPU performance of 7 times compared
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635 to reset default settings!! */
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637 #if defined(CFG_MPC5516)
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638 /* Disable pipelined reads when flash options are changed. */
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639 FLASH.MCR.B.PRD = 1;
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641 /* Enable master prefetch for e200z1 and eDMA. */
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642 FLASH.PFCRP0.B.M0PFE = 1;
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643 FLASH.PFCRP0.B.M2PFE = 1;
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645 /* Address pipelining control. Must be set to the same value as RWSC. */
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646 FLASH.PFCRP0.B.APC = 2;
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647 FLASH.PFCRP0.B.RWSC = 2;
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649 /* Write wait states. */
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650 FLASH.PFCRP0.B.WWSC = 1;
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652 /* Enable data prefetch. */
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653 FLASH.PFCRP0.B.DPFEN = 1;
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655 /* Enable instruction prefetch. */
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656 FLASH.PFCRP0.B.IPFEN = 1;
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658 /* Prefetch algorithm. */
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659 /* TODO: Ask Freescale about this option. */
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660 FLASH.PFCRP0.B.PFLIM = 2;
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662 /* Enable line read buffers. */
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663 FLASH.PFCRP0.B.BFEN = 1;
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665 /* Enable pipelined reads again. */
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666 FLASH.MCR.B.PRD = 0;
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667 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)
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668 //TODO: Lägg till flash för mpc5554 &67
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672 void McuE_EnableInterrupts(void)
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677 void McuE_DisableInterrupts(void)
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