2 * Configuration of module: Rte (Rte_Type.h)
\r
7 * Configured for (MCU): TMS570
\r
9 * Module vendor: ArcCore
\r
10 * Generator version: 0.0.13
\r
12 * Generated by Arctic Studio (http://arccore.com)
\r
22 typedef void * Rte_Instance;
\r
24 typedef boolean Boolean;
\r
26 #define _DEFINED_TYPEDEF_FOR_Boolean_
\r
28 typedef uint8 DigitalLevel;
\r
30 #define Low ((DigitalLevel)0)
\r
33 #define High ((DigitalLevel)1)
\r
35 #define DigitalLevel_LowerLimit 0
\r
36 #define DigitalLevel_UpperLimit 1
\r
38 #define _DEFINED_TYPEDEF_FOR_DigitalLevel_
\r
40 typedef uint8 EcuM_BootTargetType;
\r
41 #ifndef ECUM_BOOT_TARGET_APP
\r
42 #define ECUM_BOOT_TARGET_APP ((EcuM_BootTargetType)0)
\r
43 #endif /*ECUM_BOOT_TARGET_APP*/
\r
44 #ifndef ECUM_BOOT_TARGET_OEM_BOOTLOADER
\r
45 #define ECUM_BOOT_TARGET_OEM_BOOTLOADER ((EcuM_BootTargetType)1)
\r
46 #endif /*ECUM_BOOT_TARGET_OEM_BOOTLOADER*/
\r
47 #ifndef ECUM_BOOT_TARGET_SYS_BOOTLOADER
\r
48 #define ECUM_BOOT_TARGET_SYS_BOOTLOADER ((EcuM_BootTargetType)2)
\r
49 #endif /*ECUM_BOOT_TARGET_SYS_BOOTLOADER*/
\r
50 #define EcuM_BootTargetType_LowerLimit 0
\r
51 #define EcuM_BootTargetType_UpperLimit 1
\r
53 #define _DEFINED_TYPEDEF_FOR_EcuM_BootTargetType_
\r
55 typedef uint8 EcuM_StateType;
\r
56 #ifndef ECUM_STATE_STARTUP
\r
57 #define ECUM_STATE_STARTUP ((EcuM_StateType)16)
\r
58 #endif /*ECUM_STATE_STARTUP*/
\r
59 #ifndef ECUM_STATE_STARTUP_ONE
\r
60 #define ECUM_STATE_STARTUP_ONE ((EcuM_StateType)17)
\r
61 #endif /*ECUM_STATE_STARTUP_ONE*/
\r
62 #ifndef ECUM_STATE_STARTUP_TWO
\r
63 #define ECUM_STATE_STARTUP_TWO ((EcuM_StateType)18)
\r
64 #endif /*ECUM_STATE_STARTUP_TWO*/
\r
65 #ifndef ECUM_STATE_WAKEUP
\r
66 #define ECUM_STATE_WAKEUP ((EcuM_StateType)32)
\r
67 #endif /*ECUM_STATE_WAKEUP*/
\r
68 #ifndef ECUM_STATE_WAKEUP_ONE
\r
69 #define ECUM_STATE_WAKEUP_ONE ((EcuM_StateType)33)
\r
70 #endif /*ECUM_STATE_WAKEUP_ONE*/
\r
71 #ifndef ECUM_STATE_WAKEUP_VALIDATION
\r
72 #define ECUM_STATE_WAKEUP_VALIDATION ((EcuM_StateType)34)
\r
73 #endif /*ECUM_STATE_WAKEUP_VALIDATION*/
\r
74 #ifndef ECUM_STATE_WAKEUP_REACTION
\r
75 #define ECUM_STATE_WAKEUP_REACTION ((EcuM_StateType)35)
\r
76 #endif /*ECUM_STATE_WAKEUP_REACTION*/
\r
77 #ifndef ECUM_STATE_WAKEUP_TWO
\r
78 #define ECUM_STATE_WAKEUP_TWO ((EcuM_StateType)36)
\r
79 #endif /*ECUM_STATE_WAKEUP_TWO*/
\r
80 #ifndef ECUM_STATE_WAKEUP_WAKESLEEP
\r
81 #define ECUM_STATE_WAKEUP_WAKESLEEP ((EcuM_StateType)37)
\r
82 #endif /*ECUM_STATE_WAKEUP_WAKESLEEP*/
\r
83 #ifndef ECUM_STATE_WAKEUP_TTII
\r
84 #define ECUM_STATE_WAKEUP_TTII ((EcuM_StateType)38)
\r
85 #endif /*ECUM_STATE_WAKEUP_TTII*/
\r
86 #ifndef ECUM_STATE_RUN
\r
87 #define ECUM_STATE_RUN ((EcuM_StateType)48)
\r
88 #endif /*ECUM_STATE_RUN*/
\r
89 #ifndef ECUM_STATE_APP_RUN
\r
90 #define ECUM_STATE_APP_RUN ((EcuM_StateType)50)
\r
91 #endif /*ECUM_STATE_APP_RUN*/
\r
92 #ifndef ECUM_STATE_APP_POST_RUN
\r
93 #define ECUM_STATE_APP_POST_RUN ((EcuM_StateType)51)
\r
94 #endif /*ECUM_STATE_APP_POST_RUN*/
\r
95 #ifndef ECUM_STATE_SHUTDOWN
\r
96 #define ECUM_STATE_SHUTDOWN ((EcuM_StateType)64)
\r
97 #endif /*ECUM_STATE_SHUTDOWN*/
\r
98 #ifndef ECUM_STATE_PREP_SHUTDOWN
\r
99 #define ECUM_STATE_PREP_SHUTDOWN ((EcuM_StateType)68)
\r
100 #endif /*ECUM_STATE_PREP_SHUTDOWN*/
\r
101 #ifndef ECUM_STATE_GO_SLEEP
\r
102 #define ECUM_STATE_GO_SLEEP ((EcuM_StateType)73)
\r
103 #endif /*ECUM_STATE_GO_SLEEP*/
\r
104 #ifndef ECUM_STATE_GO_OFF_ONE
\r
105 #define ECUM_STATE_GO_OFF_ONE ((EcuM_StateType)77)
\r
106 #endif /*ECUM_STATE_GO_OFF_ONE*/
\r
107 #ifndef ECUM_STATE_GO_OFF_TWO
\r
108 #define ECUM_STATE_GO_OFF_TWO ((EcuM_StateType)78)
\r
109 #endif /*ECUM_STATE_GO_OFF_TWO*/
\r
110 #ifndef ECUM_STATE_SLEEP
\r
111 #define ECUM_STATE_SLEEP ((EcuM_StateType)80)
\r
112 #endif /*ECUM_STATE_SLEEP*/
\r
113 #ifndef ECUM_STATE_OFF
\r
114 #define ECUM_STATE_OFF ((EcuM_StateType)128)
\r
115 #endif /*ECUM_STATE_OFF*/
\r
116 #ifndef ECUM_STATE_RESET
\r
117 #define ECUM_STATE_RESET ((EcuM_StateType)144)
\r
118 #endif /*ECUM_STATE_RESET*/
\r
119 #define EcuM_StateType_LowerLimit 0x10
\r
120 #define EcuM_StateType_UpperLimit 0x90
\r
122 #define _DEFINED_TYPEDEF_FOR_EcuM_StateType_
\r
124 typedef float Float;
\r
126 #define _DEFINED_TYPEDEF_FOR_Float_
\r
128 typedef sint32 Hertz;
\r
129 #define Hertz_LowerLimit -2147483647
\r
130 #define Hertz_UpperLimit 2147483647
\r
132 #define _DEFINED_TYPEDEF_FOR_Hertz_
\r
134 typedef uint16 IoHwAb_SignalType;
\r
135 #define IoHwAb_SignalType_LowerLimit 0
\r
136 #define IoHwAb_SignalType_UpperLimit 65535
\r
138 #define _DEFINED_TYPEDEF_FOR_IoHwAb_SignalType_
\r
140 typedef sint32 MilliAmpere;
\r
141 #define MilliAmpere_LowerLimit -2147483647
\r
142 #define MilliAmpere_UpperLimit 2147483647
\r
144 #define _DEFINED_TYPEDEF_FOR_MilliAmpere_
\r
146 typedef sint32 MilliOhm;
\r
147 #define MilliOhm_LowerLimit -2147483647
\r
148 #define MilliOhm_UpperLimit 2147483647
\r
150 #define _DEFINED_TYPEDEF_FOR_MilliOhm_
\r
152 typedef sint32 MilliVolt;
\r
153 #define MilliVolt_LowerLimit -2147483647
\r
154 #define MilliVolt_UpperLimit 2147483647
\r
156 #define _DEFINED_TYPEDEF_FOR_MilliVolt_
\r
158 typedef uint8 NvM_RequestResultType;
\r
160 #define NVM_REQ_OK ((NvM_RequestResultType)0)
\r
161 #endif /*NVM_REQ_OK*/
\r
162 #ifndef NVM_REQ_NOT_OK
\r
163 #define NVM_REQ_NOT_OK ((NvM_RequestResultType)1)
\r
164 #endif /*NVM_REQ_NOT_OK*/
\r
165 #ifndef NVM_REQ_PENDING
\r
166 #define NVM_REQ_PENDING ((NvM_RequestResultType)2)
\r
167 #endif /*NVM_REQ_PENDING*/
\r
168 #ifndef NVM_REQ_INTEGRITY_FAILED
\r
169 #define NVM_REQ_INTEGRITY_FAILED ((NvM_RequestResultType)3)
\r
170 #endif /*NVM_REQ_INTEGRITY_FAILED*/
\r
171 #ifndef NVM_REQ_BLOCK_SKIPPED
\r
172 #define NVM_REQ_BLOCK_SKIPPED ((NvM_RequestResultType)4)
\r
173 #endif /*NVM_REQ_BLOCK_SKIPPED*/
\r
174 #ifndef NVM_REQ_NV_INVALIDATED
\r
175 #define NVM_REQ_NV_INVALIDATED ((NvM_RequestResultType)5)
\r
176 #endif /*NVM_REQ_NV_INVALIDATED*/
\r
178 #define _DEFINED_TYPEDEF_FOR_NvM_RequestResultType_
\r
180 typedef sint32 Percent;
\r
181 #define Percent_LowerLimit -2147483647
\r
182 #define Percent_UpperLimit 2147483647
\r
184 #define _DEFINED_TYPEDEF_FOR_Percent_
\r
186 typedef sint16 SInt16;
\r
187 #define SInt16_LowerLimit -32768
\r
188 #define SInt16_UpperLimit 32767
\r
190 #define _DEFINED_TYPEDEF_FOR_SInt16_
\r
192 typedef sint32 SInt32;
\r
193 #define SInt32_LowerLimit -2147483648
\r
194 #define SInt32_UpperLimit 2147483647
\r
196 #define _DEFINED_TYPEDEF_FOR_SInt32_
\r
198 typedef sint8 SInt8;
\r
199 #define SInt8_LowerLimit -128
\r
200 #define SInt8_UpperLimit 127
\r
202 #define _DEFINED_TYPEDEF_FOR_SInt8_
\r
204 typedef uint8 SignalQuality;
\r
205 #ifndef SignalQuality_InitialValue
\r
206 #define SignalQuality_InitialValue ((SignalQuality)0)
\r
207 #endif /*SignalQuality_InitialValue*/
\r
208 #ifndef SignalQuality_Error
\r
209 #define SignalQuality_Error ((SignalQuality)1)
\r
210 #endif /*SignalQuality_Error*/
\r
211 #ifndef SignalQuality_Bad
\r
212 #define SignalQuality_Bad ((SignalQuality)2)
\r
213 #endif /*SignalQuality_Bad*/
\r
214 #ifndef SignalQuality_Good
\r
215 #define SignalQuality_Good ((SignalQuality)3)
\r
216 #endif /*SignalQuality_Good*/
\r
217 #define SignalQuality_LowerLimit 0
\r
218 #define SignalQuality_UpperLimit 3
\r
220 #define _DEFINED_TYPEDEF_FOR_SignalQuality_
\r
222 typedef uint16 UInt16;
\r
223 #define UInt16_LowerLimit 0
\r
224 #define UInt16_UpperLimit 65535
\r
226 #define _DEFINED_TYPEDEF_FOR_UInt16_
\r
228 typedef uint32 UInt32;
\r
229 #define UInt32_LowerLimit 0
\r
230 #define UInt32_UpperLimit 4294967295
\r
232 #define _DEFINED_TYPEDEF_FOR_UInt32_
\r
234 typedef uint8 UInt8;
\r
235 #define UInt8_LowerLimit 0
\r
236 #define UInt8_UpperLimit 255
\r
238 #define _DEFINED_TYPEDEF_FOR_UInt8_
\r
240 typedef UInt8 DstPtrType[1024];
\r
242 #define _DEFINED_TYPEDEF_FOR_DstPtrType_
\r
246 } Rte_DE_Read_TesterRunnable_ReadArg1;
\r
250 } Rte_DE_Read_TesterRunnable_ReadArg2;
\r
254 } Rte_DE_Write_TesterRunnable_WriteResult;
\r
258 } Rte_DE_Read_FreqReqRunnable_ReadFreqReq;
\r
262 } Rte_DE_Write_FreqReqRunnable_WriteFreqReqInd;
\r
266 } Rte_DE_Read_LoggerRunnable_ReadResult;
\r
270 } Rte_DE_Read_Logger2Runnable_ReadResult;
\r
272 typedef uint8 Rte_ModeType_EcuM_Mode;
\r
273 #define RTE_TRANSITION_EcuM_Mode ((Rte_ModeType_EcuM_Mode)6)
\r
274 #define RTE_MODE_EcuM_Mode_STARTUP ((Rte_ModeType_EcuM_Mode)4)
\r
275 #define RTE_MODE_EcuM_Mode_RUN ((Rte_ModeType_EcuM_Mode)1)
\r
276 #define RTE_MODE_EcuM_Mode_POST_RUN ((Rte_ModeType_EcuM_Mode)0)
\r
277 #define RTE_MODE_EcuM_Mode_SLEEP ((Rte_ModeType_EcuM_Mode)3)
\r
278 #define RTE_MODE_EcuM_Mode_WAKE_SLEEP ((Rte_ModeType_EcuM_Mode)5)
\r
279 #define RTE_MODE_EcuM_Mode_SHUTDOWN ((Rte_ModeType_EcuM_Mode)2)
\r
281 typedef uint8 Rte_ModeType_WdgMMode;
\r
282 #define RTE_TRANSITION_WdgMMode ((Rte_ModeType_WdgMMode)5)
\r
283 #define RTE_MODE_WdgMMode_ALIVE_OK ((Rte_ModeType_WdgMMode)3)
\r
284 #define RTE_MODE_WdgMMode_ALIVE_FAILED ((Rte_ModeType_WdgMMode)2)
\r
285 #define RTE_MODE_WdgMMode_ALIVE_EXPIRED ((Rte_ModeType_WdgMMode)1)
\r
286 #define RTE_MODE_WdgMMode_ALIVE_STOPPED ((Rte_ModeType_WdgMMode)4)
\r
287 #define RTE_MODE_WdgMMode_ALIVE_DEACTIVATED ((Rte_ModeType_WdgMMode)0)
\r
290 } Rte_PDS_Calculator_CalculatorOperations_P;
\r
292 } Rte_PDS_Calculator_CalculatorOperations_R;
\r
295 } Rte_PDS_Tester_CalculatorOperations_P;
\r
297 } Rte_PDS_Tester_CalculatorOperations_R;
\r
300 Std_ReturnType (*Write_arg1)(UInt8);
\r
301 Std_ReturnType (*Write_arg2)(UInt8);
\r
302 } Rte_PDS_Tester_ArgumentIf_P;
\r
304 Std_ReturnType (*Read_arg1)(UInt8);
\r
305 Std_ReturnType (*Read_arg2)(UInt8);
\r
306 } Rte_PDS_Tester_ArgumentIf_R;
\r
309 Std_ReturnType (*Write_result)(UInt16);
\r
310 } Rte_PDS_Tester_ResultIf_P;
\r
312 Std_ReturnType (*Read_result)(UInt16);
\r
313 } Rte_PDS_Tester_ResultIf_R;
\r
316 Std_ReturnType (*Write_freq)(UInt32);
\r
317 } Rte_PDS_Tester_FreqReqIf_P;
\r
319 Std_ReturnType (*Read_freq)(UInt32);
\r
320 } Rte_PDS_Tester_FreqReqIf_R;
\r
323 Rte_DE_Read_TesterRunnable_ReadArg1* TesterRunnable_Arguments_arg1;
\r
324 Rte_DE_Read_TesterRunnable_ReadArg2* TesterRunnable_Arguments_arg2;
\r
325 Rte_DE_Read_FreqReqRunnable_ReadFreqReq* FreqReqRunnable_FreqReq_freq;
\r
326 Rte_DE_Write_TesterRunnable_WriteResult* TesterRunnable_Result_result;
\r
327 Rte_DE_Write_FreqReqRunnable_WriteFreqReqInd* FreqReqRunnable_FreqReqInd_freq;
\r
331 Std_ReturnType (*Write_result)(UInt16);
\r
332 } Rte_PDS_Logger_ResultIf_P;
\r
334 Std_ReturnType (*Read_result)(UInt16);
\r
335 } Rte_PDS_Logger_ResultIf_R;
\r
338 Rte_DE_Read_LoggerRunnable_ReadResult* LoggerRunnable_Result_result;
\r
342 Std_ReturnType (*Write_result)(UInt16);
\r
343 } Rte_PDS_Logger2_ResultIf_P;
\r
345 Std_ReturnType (*Read_result)(UInt16);
\r
346 } Rte_PDS_Logger2_ResultIf_R;
\r
349 Rte_DE_Read_Logger2Runnable_ReadResult* Logger2Runnable_Result_result;
\r