1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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19 #include "Std_Types.h"
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22 #if defined(USE_DEM)
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25 #include "mpc55xx.h"
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31 //#define USE_LDEBUG_PRINTF 1
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34 #define SYSCLOCK_SELECT_PLL 0x2
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36 #if defined(CFG_MPC5567)
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37 #define CALC_SYSTEM_CLOCK(_extal,_emfd,_eprediv,_erfd) \
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38 ( (_extal) * ((_emfd)+4) / (((_eprediv)+1)*(1<<(_erfd))) )
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39 #elif defined(CFG_MPC5606S)
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40 #define CALC_SYSTEM_CLOCK(_extal,_emfd,_eprediv,_erfd) \
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41 ( (_extal)*(_emfd) / ((_eprediv+1)*(2<<(_erfd))) )
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43 #define CALC_SYSTEM_CLOCK(_extal,_emfd,_eprediv,_erfd) \
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44 ( (_extal) * ((_emfd)+16) / (((_eprediv)+1)*((_erfd)+1)) )
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47 typedef void (*vfunc_t)();
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49 /* Function declarations. */
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50 static void Mcu_ConfigureFlash(void);
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53 uint32 lossOfLockCnt;
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54 uint32 lossOfClockCnt;
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58 * Type that holds all global data for Mcu
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62 // Set if Mcu_Init() have been called
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65 const Mcu_ConfigType *config;
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66 Mcu_ClockType clockSetting;
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70 /* Development error macros. */
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71 #if ( MCU_DEV_ERROR_DETECT == STD_ON )
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72 #define VALIDATE(_exp,_api,_err ) \
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74 Det_ReportError(MODULE_ID_MCU,0,_api,_err); \
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78 #define VALIDATE_W_RV(_exp,_api,_err,_rv ) \
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80 Det_ReportError(MODULE_ID_MCU,0,_api,_err); \
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84 #define VALIDATE(_exp,_api,_err )
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85 #define VALIDATE_W_RV(_exp,_api,_err,_rv )
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89 Mcu_GlobalType Mcu_Global =
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92 .config = &McuConfigData[0],
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95 //-------------------------------------------------------------------
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97 static void Mcu_LossOfLock( void ){
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98 #if defined(USE_DEM)
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99 Dem_ReportErrorStatus(MCU_E_CLOCK_FAILURE, DEM_EVENT_STATUS_FAILED);
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104 * This interrupt may be triggered more than expected.
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105 * If you are going to use this interrupt, see [Freescale Device Errata MPC5510ACE, Rev. 10 APR 2009, errata ID: 6764].
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108 #if defined(CFG_MPC5606S)
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111 Mcu_Global.stats.lossOfLockCnt++;
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113 FMPLL.SYNSR.B.LOLF = 1;
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117 //-------------------------------------------------------------------
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119 static void Mcu_LossOfCLock( void ){
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120 /* Should report MCU_E_CLOCK_FAILURE with DEM here */
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121 #if defined(CFG_MPC5606S)
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124 Mcu_Global.stats.lossOfClockCnt++;
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126 FMPLL.SYNSR.B.LOCF = 1;
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130 #define SPR_PIR 286
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131 #define SPR_PVR 287
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133 #define CORE_PVR_E200Z1 0x81440000UL
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134 #define CORE_PVR_E200Z0 0x81710000UL
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135 #define CORE_PVR_E200Z3 0x81120000UL
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136 #define CORE_PVR_E200Z6 0x81170000UL
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137 #define CORE_PVR_E200Z0H 0x817F0000UL
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149 cpu_info_t cpu_info_list[] = {
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150 #if defined(CFG_MPC5516)
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153 .pvr = CORE_PVR_E200Z1,
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157 .pvr = CORE_PVR_E200Z0,
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159 #elif defined(CFG_MPC5567)
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162 .pvr = CORE_PVR_E200Z6,
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164 #elif defined(CFG_MPC5633)
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167 .pvr = CORE_PVR_E200Z3,
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169 #elif defined(CFG_MPC5606S)
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171 .name = "MPC5606S",
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172 .pvr = CORE_PVR_E200Z0H,
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177 core_info_t core_info_list[] = {
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178 #if defined(CFG_MPC5516)
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180 .name = "CORE_E200Z1",
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181 .pvr = CORE_PVR_E200Z1,
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184 .name = "CORE_E200Z1",
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185 .pvr = CORE_PVR_E200Z1,
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187 #elif defined(CFG_MPC5567)
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189 .name = "CORE_E200Z6",
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190 .pvr = CORE_PVR_E200Z6,
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192 #elif defined(CFG_MPC5633)
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194 .name = "CORE_E200Z3",
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195 .pvr = CORE_PVR_E200Z3,
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197 #elif defined(CFG_MPC5606S)
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199 .name = "MPC5606S",
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200 .pvr = CORE_PVR_E200Z0H,
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206 #if !defined(ARRAY_SIZE)
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207 #define ARRAY_SIZE(_x) (sizeof(_x)/sizeof((_x)[0]))
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210 static cpu_info_t *Mcu_IdentifyCpu(uint32 pvr)
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214 for (i = 0; i < ARRAY_SIZE(cpu_info_list); i++) {
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215 if (cpu_info_list[i].pvr == pvr) {
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216 return &cpu_info_list[i];
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223 static core_info_t *Mcu_IdentifyCore(uint32 pvr)
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227 for (i = 0; i < ARRAY_SIZE(core_info_list); i++) {
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228 if (core_info_list[i].pvr == pvr) {
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229 return &core_info_list[i];
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236 static uint32 Mcu_CheckCpu( void ) {
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239 cpu_info_t *cpuType;
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240 core_info_t *coreType;
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242 // We have to registers to read here, PIR and PVR
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243 pir = get_spr(SPR_PIR);
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244 pvr = get_spr(SPR_PVR);
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246 cpuType = Mcu_IdentifyCpu(pvr);
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247 coreType = Mcu_IdentifyCore(pvr);
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249 if( (cpuType == NULL) || (coreType == NULL) ) {
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254 //DEBUG(DEBUG_HIGH,"/drivers/mcu: Cpu: %s( 0x%08x )\n",cpuType->name,pvr);
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255 //DEBUG(DEBUG_HIGH,"/drivers/mcu: Core: %s( 0x%08x )\n",coreType->name,pvr);
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260 //-------------------------------------------------------------------
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262 void Mcu_Init(const Mcu_ConfigType *configPtr)
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264 VALIDATE( ( NULL != configPtr ), MCU_INIT_SERVICE_ID, MCU_E_PARAM_CONFIG );
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266 #if defined(CFG_MPC5606S)
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267 /* Disable watchdog. Watchdog is enabled default after reset.*/
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268 SWT.SR.R = 0x0000c520; /* Write keys to clear soft lock bit */
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269 SWT.SR.R = 0x0000d928;
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270 SWT.CR.R = 0x8000010A; /* Disable watchdog */
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271 #if defined(USE_WDG)
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272 SWT.TO.R = 0xfa00; /* set the timout to 500ms */
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273 SWT.CR.R = 0x8000011B; /* enable watchdog */
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277 if( !SIMULATOR() ) {
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281 memset(&Mcu_Global.stats,0,sizeof(Mcu_Global.stats));
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284 Mcu_ConfigureFlash();
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286 Mcu_Global.config = configPtr;
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288 #if defined(CFG_MPC5606S)
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289 /* Enable DRUN, RUN0, SAFE, RESET modes */
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290 ME.MER.R = 0x0000001D;
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293 Mcu_Global.initRun = 1;
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295 if( Mcu_Global.config->McuClockSrcFailureNotification == TRUE ) {
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296 #if defined(CFG_MPC5606S)
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299 Irq_AttachIsr1(Mcu_LossOfLock, NULL, PLL_SYNSR_LOLF,10 );
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300 #if defined(CFG_MPC5516)
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301 FMPLL.ESYNCR2.B.LOLIRQ = 1;
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302 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)
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303 FMPLL.SYNCR.B.LOLIRQ = 1;
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305 Irq_AttachIsr1(Mcu_LossOfCLock, NULL, PLL_SYNSR_LOCF,10 );
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306 #if defined(CFG_MPC5516)
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307 FMPLL.ESYNCR2.B.LOCIRQ = 1;
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308 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)
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309 FMPLL.SYNCR.B.LOCIRQ = 1;
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315 //-------------------------------------------------------------------
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319 Mcu_Global.initRun = FALSE; // Very simple Deinit. Should we do more?
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322 //-------------------------------------------------------------------
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324 Std_ReturnType Mcu_InitRamSection(const Mcu_RamSectionType RamSection)
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326 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_INITRAMSECTION_SERVICE_ID, MCU_E_UNINIT, E_NOT_OK );
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327 VALIDATE_W_RV( ( RamSection <= Mcu_Global.config->McuRamSectors ), MCU_INITRAMSECTION_SERVICE_ID, MCU_E_PARAM_RAMSECTION, E_NOT_OK );
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329 /* NOT SUPPORTED, reason: no support for external RAM */
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334 //-------------------------------------------------------------------
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336 Std_ReturnType Mcu_InitClock(const Mcu_ClockType ClockSetting)
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338 Mcu_ClockSettingConfigType *clockSettingsPtr;
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339 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_INITCLOCK_SERVICE_ID, MCU_E_UNINIT, E_NOT_OK );
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340 VALIDATE_W_RV( ( ClockSetting < Mcu_Global.config->McuClockSettings ), MCU_INITCLOCK_SERVICE_ID, MCU_E_PARAM_CLOCK, E_NOT_OK );
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342 Mcu_Global.clockSetting = ClockSetting;
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343 clockSettingsPtr = &Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting];
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345 // TODO: find out if the 5554 really works like the 5516 here
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346 // All three (16, 54, 67) used to run the same code here though, so i'm sticking it with 5516
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347 #if defined(CFG_MPC5516) || defined(CFG_MPC5554)
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349 * Fsys - System frequency ( CPU + all periperals? )
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351 * Fsys = EXTAL_FREQ *( (emfd+16) / ( (eprediv+1) * ( erfd+1 )) ) )
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354 assert((clockSettingsPtr->Pll2>=32) && (clockSettingsPtr->Pll2<=132));
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355 assert( (clockSettingsPtr->Pll1 != 6) &&
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356 (clockSettingsPtr->Pll1 != 8) &&
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357 (clockSettingsPtr->Pll1 < 10) );
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358 assert( clockSettingsPtr->Pll3 & 1); // Must be odd
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359 #elif defined(CFG_MPC5567)
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360 /* 5567 clock info:
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361 * Fsys = EXTAL_FREQ *( (emfd+4) / ( (eprediv+1) * ( 2^erfd )) ) )
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364 assert(clockSettingsPtr->Pll2 < 16);
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365 assert(clockSettingsPtr->Pll1 <= 4);
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366 assert(clockSettingsPtr->Pll3 < 8);
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369 #if defined(USE_LDEBUG_PRINTF)
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371 uint32 extal = Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].McuClockReferencePointFrequency;
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374 f_sys = CALC_SYSTEM_CLOCK( extal,
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375 clockSettingsPtr->Pll2,
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376 clockSettingsPtr->Pll1,
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377 clockSettingsPtr->Pll3 );
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379 //DEBUG(DEBUG_HIGH,"/drivers/mcu: F_sys will be:%08d Hz\n",f_sys);
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383 #if defined(CFG_MPC5516)
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385 // External crystal PLL mode.
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386 FMPLL.ESYNCR1.B.CLKCFG = 7; //TODO: Hur ställa detta för 5567?
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388 // Write pll parameters.
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389 FMPLL.ESYNCR1.B.EPREDIV = clockSettingsPtr->Pll1;
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390 FMPLL.ESYNCR1.B.EMFD = clockSettingsPtr->Pll2;
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391 FMPLL.ESYNCR2.B.ERFD = clockSettingsPtr->Pll3;
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393 // Connect SYSCLK to FMPLL
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394 SIU.SYSCLK.B.SYSCLKSEL = SYSCLOCK_SELECT_PLL;
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395 #elif defined(CFG_MPC5606S)
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396 // Write pll parameters.
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397 CGM.FMPLL[0].CR.B.IDF = clockSettingsPtr->Pll1;
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398 CGM.FMPLL[0].CR.B.NDIV = clockSettingsPtr->Pll2;
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399 CGM.FMPLL[0].CR.B.ODF = clockSettingsPtr->Pll3;
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401 /* RUN0 cfg: 16MHzIRCON,OSC0ON,PLL0ON,syclk=PLL0 */
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402 ME.RUN[0].R = 0x001F0074;
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403 /* Peri. Cfg. 1 settings: only run in RUN0 mode */
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404 ME.RUNPC[1].R = 0x00000010;
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405 /* MPC56xxB/S: select ME.RUNPC[1] */
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406 ME.PCTL[68].R = 0x01; //SIUL control
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407 ME.PCTL[91].R = 0x01; //RTC/API control
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408 ME.PCTL[92].R = 0x01; //PIT_RTI control
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409 ME.PCTL[72].R = 0x01; //eMIOS0 control
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410 ME.PCTL[73].R = 0x01; //eMIOS1 control
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411 ME.PCTL[16].R = 0x01; //FlexCAN0 control
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412 ME.PCTL[17].R = 0x01; //FlexCAN1 control
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413 ME.PCTL[4].R = 0x01; /* MPC56xxB/P/S DSPI0: select ME.RUNPC[0] */
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414 ME.PCTL[5].R = 0x01; /* MPC56xxB/P/S DSPI1: select ME.RUNPC[0] */
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415 ME.PCTL[32].R = 0x01; //ADC0 control
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416 ME.PCTL[23].R = 0x01; //DMAMUX control
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417 ME.PCTL[48].R = 0x01; /* MPC56xxB/P/S LINFlex 0: select ME.RUNPC[1] */
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418 /* Mode Transition to enter RUN0 mode: */
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419 /* Enter RUN0 Mode & Key */
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420 ME.MCTL.R = 0x40005AF0;
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421 /* Enter RUN0 Mode & Inverted Key */
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422 ME.MCTL.R = 0x4000A50F;
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424 /* Wait for mode transition to complete */
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425 while (ME.GS.B.S_MTRANS) {}
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426 /* Verify RUN0 is the current mode */
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427 while(ME.GS.B.S_CURRENTMODE != 4) {}
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429 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)
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430 // Partially following the steps in MPC5567 RM..
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431 FMPLL.SYNCR.B.DEPTH = 0;
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432 FMPLL.SYNCR.B.LOLRE = 0;
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433 FMPLL.SYNCR.B.LOLIRQ = 0;
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435 FMPLL.SYNCR.B.PREDIV = clockSettingsPtr->Pll1;
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436 FMPLL.SYNCR.B.MFD = clockSettingsPtr->Pll2;
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437 FMPLL.SYNCR.B.RFD = clockSettingsPtr->Pll3;
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439 // Wait for PLL to sync.
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440 while (Mcu_GetPllStatus() != MCU_PLL_LOCKED) ;
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442 FMPLL.SYNCR.B.LOLIRQ = 1;
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448 //-------------------------------------------------------------------
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450 void Mcu_DistributePllClock(void)
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452 VALIDATE( ( 1 == Mcu_Global.initRun ), MCU_DISTRIBUTEPLLCLOCK_SERVICE_ID, MCU_E_UNINIT );
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453 #if defined(CFG_MPC5606S)
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454 VALIDATE( ( CGM.FMPLL[0].CR.B.S_LOCK == 1 ), MCU_DISTRIBUTEPLLCLOCK_SERVICE_ID, MCU_E_PLL_NOT_LOCKED );
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456 VALIDATE( ( FMPLL.SYNSR.B.LOCK == 1 ), MCU_DISTRIBUTEPLLCLOCK_SERVICE_ID, MCU_E_PLL_NOT_LOCKED );
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458 /* NOT IMPLEMENTED due to pointless function on this hardware */
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462 //-------------------------------------------------------------------
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464 Mcu_PllStatusType Mcu_GetPllStatus(void)
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466 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_GETPLLSTATUS_SERVICE_ID, MCU_E_UNINIT, MCU_PLL_STATUS_UNDEFINED );
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467 Mcu_PllStatusType rv;
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471 #if defined(CFG_MPC5606S)
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472 if ( !CGM.FMPLL[0].CR.B.S_LOCK )
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474 rv = MCU_PLL_UNLOCKED;
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477 rv = MCU_PLL_LOCKED;
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480 if ( !FMPLL.SYNSR.B.LOCK )
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482 rv = MCU_PLL_UNLOCKED;
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485 rv = MCU_PLL_LOCKED;
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491 /* We are running on instruction set simulator. PLL is then always in sync... */
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492 rv = MCU_PLL_LOCKED;
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498 //-------------------------------------------------------------------
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500 Mcu_ResetType Mcu_GetResetReason(void)
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504 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_GETRESETREASON_SERVICE_ID, MCU_E_UNINIT, MCU_RESET_UNDEFINED );
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506 #if defined(CFG_MPC5606S)
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507 if( RGM.FES.B.F_SOFT ) {
\r
509 } else if( RGM.DES.B.F_SWT ) {
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510 rv = MCU_WATCHDOG_RESET;
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511 } else if( RGM.DES.B.F_POR ) {
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512 rv = MCU_POWER_ON_RESET;
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514 rv = MCU_RESET_UNDEFINED;
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517 if( SIU.RSR.B.SSRS ) {
\r
519 } else if( SIU.RSR.B.WDRS ) {
\r
520 rv = MCU_WATCHDOG_RESET;
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521 } else if( SIU.RSR.B.PORS || SIU.RSR.B.ERS ) {
\r
522 rv = MCU_POWER_ON_RESET;
\r
524 rv = MCU_RESET_UNDEFINED;
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531 //-------------------------------------------------------------------
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533 Mcu_RawResetType Mcu_GetResetRawValue(void)
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535 VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_GETRESETREASON_SERVICE_ID, MCU_E_UNINIT, MCU_GETRESETRAWVALUE_UNINIT_RV );
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537 if( !Mcu_Global.initRun ) {
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538 return MCU_GETRESETRAWVALUE_UNINIT_RV;
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541 #if defined(CFG_MPC5606S)
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552 //-------------------------------------------------------------------
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554 #if ( MCU_PERFORM_RESET_API == STD_ON )
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555 void Mcu_PerformReset(void)
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557 VALIDATE( ( 1 == Mcu_Global.initRun ), MCU_PERFORMRESET_SERVICE_ID, MCU_E_UNINIT );
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560 #if defined(CFG_MPC5606S)
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561 ME.MCTL.R = 0x00005AF0;
\r
562 ME.MCTL.R = 0x0000A50F;
\r
564 while (ME.GS.B.S_MTRANS) {}
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565 while(ME.GS.B.S_CURRENTMODE != 0) {}
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567 SIU.SRCR.B.SSR = 1;
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573 //-------------------------------------------------------------------
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575 void Mcu_SetMode(const Mcu_ModeType McuMode)
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577 VALIDATE( ( 1 == Mcu_Global.initRun ), MCU_SETMODE_SERVICE_ID, MCU_E_UNINIT );
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578 // VALIDATE( ( McuMode <= Mcu_Global.config->McuNumberOfMcuModes ), MCU_SETMODE_SERVICE_ID, MCU_E_PARAM_MODE );
\r
581 /* NOT SUPPORTED */
\r
584 //-------------------------------------------------------------------
\r
587 * Get the system clock in Hz. It calculates the clock from the
\r
588 * different register settings in HW.
\r
590 uint32_t McuE_GetSystemClock(void)
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593 * System clock calculation
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595 * 5516 - f_sys = extal * (emfd+16) / ( (eprediv+1) * ( erfd+1 ));
\r
596 * 5567 - f_sys = extal * (emfd+4) / ( (eprediv+1) * ( 2^erfd ));
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597 * 563x - We run in legacy mode = 5567
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598 * 5606s - f_sys = extal * emfd / ((eprediv+1)*(2<<(erfd)));
\r
600 #if defined(CFG_MPC5516)
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601 uint32_t eprediv = FMPLL.ESYNCR1.B.EPREDIV;
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602 uint32_t emfd = FMPLL.ESYNCR1.B.EMFD;
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603 uint32_t erfd = FMPLL.ESYNCR2.B.ERFD;
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604 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567) || defined(CFG_MPC5633)
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605 uint32_t eprediv = FMPLL.SYNCR.B.PREDIV;
\r
606 uint32_t emfd = FMPLL.SYNCR.B.MFD;
\r
607 uint32_t erfd = FMPLL.SYNCR.B.RFD;
\r
608 #elif defined(CFG_MPC5606S)
\r
609 uint32_t eprediv = CGM.FMPLL[0].CR.B.IDF;
\r
610 uint32_t emfd = CGM.FMPLL[0].CR.B.NDIV;
\r
611 uint32_t erfd = CGM.FMPLL[0].CR.B.ODF;
\r
615 uint32 extal = Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].McuClockReferencePointFrequency;
\r
617 f_sys = CALC_SYSTEM_CLOCK(extal,emfd,eprediv,erfd);
\r
622 imask_t McuE_EnterCriticalSection()
\r
624 uint32_t msr = get_msr();
\r
629 void McuE_ExitCriticalSection(uint32_t old_state)
\r
631 set_msr(old_state);
\r
635 * Get the peripheral clock in Hz for a specific device
\r
637 uint32_t McuE_GetPeripheralClock(McuE_PeriperalClock_t type)
\r
639 #if defined(CFG_MPC5567)
\r
640 // No peripheral dividers on 5567.
\r
641 return McuE_GetSystemClock();
\r
643 uint32_t sysClock = McuE_GetSystemClock();
\r
644 vuint32_t prescaler;
\r
646 // See table 3.1, section 3.4.5 Peripheral Clock dividers
\r
649 case PERIPHERAL_CLOCK_FLEXCAN_A:
\r
650 case PERIPHERAL_CLOCK_DSPI_A:
\r
651 #if defined(CFG_MPC5516)
\r
652 prescaler = SIU.SYSCLK.B.LPCLKDIV0;
\r
654 #elif defined(CFG_MPC5606S)
\r
655 prescaler = CGM.SC_DC[1].R;
\r
659 case PERIPHERAL_CLOCK_PIT:
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660 case PERIPHERAL_CLOCK_ESCI_A:
\r
661 case PERIPHERAL_CLOCK_IIC_A:
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662 #if defined(CFG_MPC5516)
\r
663 prescaler = SIU.SYSCLK.B.LPCLKDIV1;
\r
667 case PERIPHERAL_CLOCK_FLEXCAN_B:
\r
668 case PERIPHERAL_CLOCK_FLEXCAN_C:
\r
669 case PERIPHERAL_CLOCK_FLEXCAN_D:
\r
670 case PERIPHERAL_CLOCK_FLEXCAN_E:
\r
671 case PERIPHERAL_CLOCK_FLEXCAN_F:
\r
672 #if defined(CFG_MPC5516)
\r
673 prescaler = SIU.SYSCLK.B.LPCLKDIV2;
\r
675 #elif defined(CFG_MPC5606S)
\r
676 prescaler = CGM.SC_DC[1].R;
\r
680 case PERIPHERAL_CLOCK_DSPI_B:
\r
681 case PERIPHERAL_CLOCK_DSPI_C:
\r
682 case PERIPHERAL_CLOCK_DSPI_D:
\r
683 #if defined(CFG_MPC5516)
\r
684 prescaler = SIU.SYSCLK.B.LPCLKDIV3;
\r
688 case PERIPHERAL_CLOCK_ESCI_B:
\r
689 case PERIPHERAL_CLOCK_ESCI_C:
\r
690 case PERIPHERAL_CLOCK_ESCI_D:
\r
691 case PERIPHERAL_CLOCK_ESCI_E:
\r
692 case PERIPHERAL_CLOCK_ESCI_F:
\r
693 case PERIPHERAL_CLOCK_ESCI_G:
\r
694 case PERIPHERAL_CLOCK_ESCI_H:
\r
695 #if defined(CFG_MPC5516)
\r
696 prescaler = SIU.SYSCLK.B.LPCLKDIV4;
\r
700 #if defined(CFG_MPC5606S)
\r
701 case PERIPHERAL_CLOCK_LIN_A:
\r
702 case PERIPHERAL_CLOCK_LIN_B:
\r
703 prescaler = CGM.SC_DC[0].R;
\r
705 case PERIPHERAL_CLOCK_EMIOS_0:
\r
706 prescaler = CGM.SC_DC[2].R;
\r
708 case PERIPHERAL_CLOCK_EMIOS_1:
\r
709 prescaler = CGM.SC_DC[2].R;
\r
712 case PERIPHERAL_CLOCK_EMIOS:
\r
713 #if defined(CFG_MPC5516)
\r
714 prescaler = SIU.SYSCLK.B.LPCLKDIV5;
\r
719 case PERIPHERAL_CLOCK_MLB:
\r
720 #if defined(CFG_MPC5516)
\r
721 prescaler = SIU.SYSCLK.B.LPCLKDIV6;
\r
730 return sysClock/(1<<prescaler);
\r
736 * Function to setup the internal flash for optimal performance
\r
739 static void Mcu_ConfigureFlash(void)
\r
741 /* These flash settings increases the CPU performance of 7 times compared
\r
742 to reset default settings!! */
\r
744 #if defined(CFG_MPC5516)
\r
745 /* Disable pipelined reads when flash options are changed. */
\r
746 FLASH.MCR.B.PRD = 1;
\r
748 /* Enable master prefetch for e200z1 and eDMA. */
\r
749 FLASH.PFCRP0.B.M0PFE = 1;
\r
750 FLASH.PFCRP0.B.M2PFE = 1;
\r
752 /* Address pipelining control. Must be set to the same value as RWSC. */
\r
753 FLASH.PFCRP0.B.APC = 2;
\r
754 FLASH.PFCRP0.B.RWSC = 2;
\r
756 /* Write wait states. */
\r
757 FLASH.PFCRP0.B.WWSC = 1;
\r
759 /* Enable data prefetch. */
\r
760 FLASH.PFCRP0.B.DPFEN = 1;
\r
762 /* Enable instruction prefetch. */
\r
763 FLASH.PFCRP0.B.IPFEN = 1;
\r
765 /* Prefetch algorithm. */
\r
766 /* TODO: Ask Freescale about this option. */
\r
767 FLASH.PFCRP0.B.PFLIM = 2;
\r
769 /* Enable line read buffers. */
\r
770 FLASH.PFCRP0.B.BFEN = 1;
\r
772 /* Enable pipelined reads again. */
\r
773 FLASH.MCR.B.PRD = 0;
\r
774 #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)
\r
775 //TODO: Lägg till flash för mpc5554 &67
\r
779 void McuE_EnableInterrupts(void)
\r
784 void McuE_DisableInterrupts(void)
\r
789 void Irq_InstallVector(void (*func)(), IrqType vector, uint8_t priority, Cpu_t cpu )
\r
793 tid = Os_Arc_CreateIsr(func, priority, "ISR_Default");
\r
794 Irq_AttachIsr2(tid, NULL, vector);
\r