mmc: arasan: Add ADMA broken quirk based on DT parameter
This patch adds 'SDHCI_QUIRK_BROKEN_ADMA' quirk to the
sdhci arasan controller based on the DT property.
With 4.6 kernel, ADMA2 is broken. So added this quirk as
a workaround and can be reverted once kernel is upgraded
or actual solution is found.
Issue with ADMA2 can be seen with the following three steps
done in regression.
1. mount SD card.
2. Read and write some random data ~1MB.
3. reboot the board.
Issue is visible after running 15 to 20mins with 4.6 kernel
and there might be a chance that issue might occur very
frequently depending on the application.
So, using the above workaround to force the controller to
use SDMA.
The performance difference between SDMA and ADMA2 is around
10-15%.
ADMA2 can be used by removing the 'broken-adma2' property
from devicetree.
Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds 'broken-adma2' property to SD node.
By adding this property controller will use SDMA
by default. This property can be removed to use ADMA2.
Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds mask for the Control register
10Mbps speed.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Documentation states that the "default-input" property should reside
directly in the node of the device. This adjusts the parsing to make the
implementation consistent with the documentation.
Based on patch by William Towle <william.towle@codethink.co.uk>.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Tested-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
phy: zynqmp: Change serdes calibraton logic to ICM_CFG1
Because of functional issues in Silicon 1.0 (XCZU9EG) which doesn't
do PMOS calibration properly, software needs to implement work around.
As a software sequence of work around, need to programe any lane to a
valid protocol. Currently serdes driver configures lane 0 (ICM_CFG0) to
PCIe for fixing the above said calibration logic issue.
Currently PCIe doesn't use serdes driver, instead it depends on fsbl for
GT lane initialization. Since serdes driver is reintializing ICM_CFG0,
PCIe is facing link down issues once linux boots.
This patch fixes the above said issue by using ICM_CFG1 instead of ICM_CFG0
for fixing the PMOS calibration issue
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: of-simple: Fix kernel hang during unbind
In dwc3_of_simple_remove() we call of_platform_depopulate() after
disabling the clocks. Since of_platform_depopulate() calls xhci_stop()
which internally stop the controller by programming the USB registers.
Since we already disabled the USB clock, kernel hangs when try to unbind.
This patch corrects the above said issue by calling of_platform_depopulate
before clock disabling.
In dwc3_of_simple_remove() we are using clk_unprepare() before
doing any clk_disable(). Because of this we see kernel warning
during unbind if we enable Common CLK framework(CCF).
This patch fixes this kernel warning by using clk_disable_unprepare
instead of clk_unprepare().
This patch adds support for gmiitorgmii converter.
The GMII to RGMII IP core provides the Reduced Gigabit Media
Independent Interface (RGMII) between Ethernet physical media
Devices and the Gigabit Ethernet controller. This core can
Switch dynamically between the three different speed modes of
Operation by configuring the converter register through mdio write.
MDIO interface is used to set operating speed of Ethernet MAC.
This converter sits between the MAC and the external phy
MAC <==> GMII2RGMII <==> RGMII_PHY
With this patch the macb driver first tries to find
the mdio node.
If it is available will create the phy/mdio devices for the
phy/mdio nodes available in the mdio.
If the mdio node is not available it will try to probe the phy nodes
available in the mac nodes as the driver does earlier.
net: ethernet: xilinx: Fix kernel crash on 64-bit platform
In the driver ptp_tx_skb variable stores the skb address
This variable is of type u32. On 64-bit platform it is causing a kernel
crash when trying to access this variable.
Filip Drazic [Mon, 29 Aug 2016 17:32:59 +0000 (19:32 +0200)]
ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domain
Previously, it was assumed that there is a 1:1 mapping between
PM ID defined in the platform firmware and a PM domain. However, there
can be a situation where multiple PM IDs belong to a single PM domain
(e.g. PM IDs for GPU and two pixel processors correspond to a single
PM domain).
This patch adds support for assigning more than one PM ID to
a single PM domain.
Updated documentation accordingly.
Assigned pixel processors PM IDs to GPU PM domain.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Filip Drazic [Thu, 25 Aug 2016 16:58:49 +0000 (18:58 +0200)]
ARM64: zynqmp: DT: Remove unused DDR PM domain
DDR power states are handled by the PM firmware, so this domain is
redundant. Also, since there is no device using this PM domain,
it will be powered off during boot, which is wrong.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Michal Simek [Wed, 27 Jul 2016 07:13:13 +0000 (09:13 +0200)]
ARM: zynq: Add support for Zynq-7000S devices
Patch adds detection of Zynq-7000 base silicon configuration,
namely Dual or Single CPU. Device trees attempting to enable DUAL CORE
behavior on SINGLE CPU Zynq-7000S devices are prevented from corrupting
system behavior.
Detection of Dual or Single CPU is done via eFuses.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
PCI: Xilinx NWL PCIe: Adding prefetchable memory space to device tree
Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 23 Aug 2016 15:21:26 +0000 (17:21 +0200)]
tty: serial: of_serial: Do not allocate greater space than required
The patch fixes the problem when there is another IP on higher addresses
which require allocation.
For example:
uart16550: 0x44a00000 - 0x44a10000 (reg offset: 0x1000)
IP: 0x44a10000 - 0x44aX0000
Current code is shifting base address with reg-offset value
(0x44a01000) but the size is the same that's why requested memory
region for ioremap is from 0x44a01000 with 0x10000 size which overlap
the next IP where requesting memory region is failing because the part
of region is already mapped.
The patch decreases mapped size with reg-offset not to overlap selected
memory address ranges.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add the mux changes for zynqmp
Based on the common mux driver with the IO accessors customized This is
needed so as to not break multi-platform support.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add zynqmp ultrascale gate support
Based on the common gate with the IO accessors customized This is
needed so as to not break multi-platform support.
Also spinlocking is removed as it is taken care by firmware.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: zynqmp: Don't change spi clock frequency for every transfer
We need to set the spi clock frequency, when there is a change
in the speed of transfer i.e if transfer->speed_hz is changed
then change the clock accordingly.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 17 Aug 2016 11:45:14 +0000 (13:45 +0200)]
ARM64: zynqmp: Add initial support for ZCU100
Board has 1GB.
uart0 is not connected. uart1 is connected to MIO 8/9.
USB GT lines should be commented because ULPI phy reset is causing
reset also for spi/wlan/bt which is breaking functionality for
these devices.
GT description for USBs and DP. Reference input clock for USB is commit
from CLK lane 0 and for DP from lane 1 that's why LANE_NUM reflects that.
Lane 0 - PS_MGTREFCLK0, Lane 1 - PS_MGTREFCLK1.
usb5744 is removed because of missing configuration via SMBUS.
For 24aa02e48, the low 3 bits of address are "don't care". Use 0 for our
dts, to prevent confusion with the other EEPROMs in the system where they
do use 0x54.
DP is setup to use fixed freq for LG monitor because si570 is not
present on the board that's why CLK is generated in PL.
Power regulator is accessible via I2C but it hasn't been tested yet
that's why it is commented.
SD0 has broken CD pin. CD works but it has to be forced by
"mwr 0xFF18035C 0x1"
wl1831 is using max-freq setup based on
http://www.ti.com/lit/ug/swru437/swru437.pdf - page 13
Power up sequence is using pwrseq-simple inspired by
"ARM: dts: omap3-igep0020: Use MMC pwrseq to init SDIO WiFi"
(sha1: fd7e118c80d43496c49a4260712cd1c499a0f1b3)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
mmc: sdhci-of-arasan: Added workaround for auto tuning.
This patch adds new workaround for auto tuning and
removed existing workaround.
New workaround:
1.The "execute tuning" clears the host controller tuning
circuit and resets the tap values to zero.
2.This reset of the tap value takes a few clock cycles so
wait for few cycles ~60 cycles.
3.Reset the DLL to load an newly updated zero tap value.
4.Send CMD19/CMD21 as a part of the auto tuning process.
5.Once the auto tuning process gets completed.
6.Reset the DLL to load the newly obtained SDHC tuned tap value.
Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for programming the
tap delays required for mmc driver.
'arasan_zynqmp_set_tap_delay' and 'zynqmp_dll_reset'
API's are exported so that mmc driver will use these
API's for tap delay programming.
Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
mmc: sdhci-of-arasan: Add compatible string for ZynqMP SoC
This patch adds the xlnx,zynqmp-8.9a compatible string
to be used for ZynqMP SoC, and adds documentation for
"xlnx,device_id" and "xlnx,mio_bank" properties.
Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
During merge tag 'v4.6' into master, one of the argument in spi-nor drivers's
erase function was changed.This patch fixes that.
Since ZynqMP GQSPI controller supports dual parallel mode configuration, as
per configuration we need to send divide by 2 offset to erase or write apis
of spi-nor.
spi_nor_erase_sector(nor, addr); here addr is actual address
spi_nor_erase_sector(nor, offset); here offset is addr/2.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 12 Aug 2016 10:33:05 +0000 (12:33 +0200)]
phy: zynqmp: Add missing header to declare exported functions
This patch removes sparse warnings:
drivers/phy/phy-zynqmp.c:311:5: warning: symbol 'xpsgtr_override_deemph'
was not declared. Should it be static?
drivers/phy/phy-zynqmp.c:328:5: warning: symbol
'xpsgtr_margining_factor' was not declared. Should it be static?
drivers/phy/phy-zynqmp.c:647:5: warning: symbol 'xpsgtr_wait_pll_lock'
was not declared. Should it be static?
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for 64 bit addressing and BDs.
-> Enable 64 bit addressing in DMACFG register.
-> Set DMA mask when design config register shows support for 64 bit addr.
-> Add new BD words for higher address when 64 bit DMA support is present.
-> Add and update TBQPH and RBQPH for MSB of BD pointers.
-> Change extraction and updation of buffer addresses to use
64 bit address.
-> In gem_rx extract address in one place insted of two and use a
separate flag for RXUSED.
Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
microblaze: Modify pci specific code to support multidomain
Proc entries will be created for every pci bus.
With current implementation,in multidomain same bus number
will repaeat but in different domain, which causes kernel crash
as already same bus number exists.
Return domain number when kernel requests while creating proc
entries for each bus.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When built with MSI support the legacy domain reference is being
overwritten with MSI.
Instead creating two seperate domains for MSI and legacy, to
handle both MSI and legacy interrupts parallely.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 12:59:50 +0000 (14:59 +0200)]
gpio: xilinx: Use readl/writel for ARM64
Use readl/writel for ARM64 instead of __raw versions.
This patch also remove compilation warnings:
drivers/gpio/gpio-xilinx.c: In function ‘xgpio_irq_mask’:
drivers/gpio/gpio-xilinx.c:300:12: warning: large integer implicitly
truncated to unsigned type [-Woverflow]
~XGPIO_GIER_IE);
^
drivers/gpio/gpio-xilinx.c:48:51: note: in definition of macro
‘xgpio_writereg’
# define xgpio_writereg(offset, val) __raw_writel(val, offset)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 13:11:48 +0000 (15:11 +0200)]
net: emaclite: Fix arm64 compilation warnings
Recast pointers with ulong instead of u32 for arm64.
This patch fixes these compilation warnings:
drivers/net/ethernet/xilinx/xilinx_emaclite.c: In function
‘xemaclite_send_data’:
drivers/net/ethernet/xilinx/xilinx_emaclite.c:335:35: warning: cast from
pointer to integer of different size [-Wpointer-to-int-cast]
addr = (void __iomem __force *)((u32 __force)addr ^
^
drivers/net/ethernet/xilinx/xilinx_emaclite.c:335:10: warning: cast to
pointer from integer of different size [-Wint-to-pointer-cast]
addr = (void __iomem __force *)((u32 __force)addr ^
^
drivers/net/ethernet/xilinx/xilinx_emaclite.c: In function
‘xemaclite_recv_data’:
drivers/net/ethernet/xilinx/xilinx_emaclite.c:393:36: warning: cast from
pointer to integer of different size [-Wpointer-to-int-cast]
addr = (void __iomem __force *)((u32 __force)addr ^
^
drivers/net/ethernet/xilinx/xilinx_emaclite.c:393:11: warning: cast to
pointer from integer of different size [-Wint-to-pointer-cast]
addr = (void __iomem __force *)((u32 __force)addr ^
^
drivers/net/ethernet/xilinx/xilinx_emaclite.c: In function
‘xemaclite_rx_handler’:
drivers/net/ethernet/xilinx/xilinx_emaclite.c:101:42: warning: cast from
pointer to integer of different size [-Wpointer-to-int-cast]
#define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
^
drivers/net/ethernet/xilinx/xilinx_emaclite.c:600:10: note: in expansion
of macro ‘BUFFER_ALIGN’
align = BUFFER_ALIGN(skb->data);
^
In file included from include/linux/dmaengine.h:20:0,
from include/linux/netdevice.h:38,
from drivers/net/ethernet/xilinx/xilinx_emaclite.c:17:
drivers/net/ethernet/xilinx/xilinx_emaclite.c: In function
‘xemaclite_of_probe’:
drivers/net/ethernet/xilinx/xilinx_emaclite.c:1169:4: warning: cast from
pointer to integer of different size [-Wpointer-to-int-cast]
(unsigned int __force)lp->base_addr, ndev->irq);
^
include/linux/device.h:1197:58: note: in definition of macro ‘dev_info’
#define dev_info(dev, fmt, arg...) _dev_info(dev, fmt, ##arg)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 13:39:42 +0000 (15:39 +0200)]
net: macb: Fixed mixed declaration and code warnings
This patch fixes these warnings:
drivers/net/ethernet/cadence/macb.c: In function ‘macb_handle_txtstamp’:
drivers/net/ethernet/cadence/macb.c:683:2: warning: ISO C90 forbids
mixed declarations and code [-Wdeclaration-after-statement]
struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
^
drivers/net/ethernet/cadence/macb.c: In function ‘macb_handle_rxtstamp’:
drivers/net/ethernet/cadence/macb.c:866:2: warning: ISO C90 forbids
mixed declarations and code [-Wdeclaration-after-statement]
struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 13:33:11 +0000 (15:33 +0200)]
usb: dwc3: Add missing parentheses in comparison
This patch fixes compilation warning:
drivers/usb/dwc3/core.c: In function ‘dwc3_frame_length_adjustment’:
drivers/usb/dwc3/core.c:156:64: warning: suggest parentheses around
comparison in operand of ‘&’ [-Wparentheses]
if (!dev_WARN_ONCE(dwc->dev, (reg & DWC3_GFLADJ_REFCLK_FLADJ ==
^
include/asm-generic/bug.h:128:27: note: in definition of macro
‘WARN_ONCE’
int __ret_warn_once = !!(condition); \
^
drivers/usb/dwc3/core.c:156:8: note: in expansion of macro
‘dev_WARN_ONCE’
if (!dev_WARN_ONCE(dwc->dev, (reg & DWC3_GFLADJ_REFCLK_FLADJ ==
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 13:06:21 +0000 (15:06 +0200)]
soc: xilinx: Guard code which is called only for debugfs
Some functions are called only when debugfs for PM is enabled.
This patch removes compilation warnings:
drivers/soc/xilinx/zynqmp/pm.c:251:12: warning: ‘zynqmp_pm_self_suspend’
defined but not used [-Wunused-function]
static int zynqmp_pm_self_suspend(const u32 node,
^
drivers/soc/xilinx/zynqmp/pm.c:300:12: warning:
‘zynqmp_pm_abort_suspend’ defined but not used [-Wunused-function]
static int zynqmp_pm_abort_suspend(const enum zynqmp_pm_abort_reason
reason)
^
drivers/soc/xilinx/zynqmp/pm.c:494:12: warning:
‘zynqmp_pm_register_notifier’ defined but not used [-Wunused-function]
static int zynqmp_pm_register_notifier(const u32 node, const u32 event,
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 13:02:44 +0000 (15:02 +0200)]
tty: serial: Initialized rxbs_status
This patch removes compilation warning:
drivers/tty/serial/xilinx_uartps.c: In function ‘cdns_uart_isr’:
drivers/tty/serial/xilinx_uartps.c:313:21: warning: ‘rxbs_status’ may be
used uninitialized in this function [-Wmaybe-uninitialized]
if ((rxbs_status & CDNS_UART_RXBS_FRAMING)
^
drivers/tty/serial/xilinx_uartps.c:245:15: note: ‘rxbs_status’ was
declared here
unsigned int rxbs_status;
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 12:34:18 +0000 (14:34 +0200)]
mtd: spi-nor: Fix flash_info assignments
Because of changes in the code several compilation warnings were
generated. Fix all assignments which generate warning:
drivers/mtd/spi-nor/spi-nor.c: In function 'spi_nor_scan':
drivers/mtd/spi-nor/spi-nor.c:1836:8: warning: assignment discards
'const' qualifier from pointer target type
info = spi_nor_match_id(name);
^
drivers/mtd/spi-nor/spi-nor.c:1839:8: warning: assignment discards
'const' qualifier from pointer target type
info = spi_nor_read_id(nor);
^
drivers/mtd/spi-nor/spi-nor.c:1863:9: warning: assignment discards
'const' qualifier from pointer target type
info = jinfo;
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 11:19:22 +0000 (13:19 +0200)]
virtio: Comment vring_map_one_sg() unused function
This patch removes compilation warning caused that one internal function
is not called.
Warning:
drivers/virtio/virtio_ring.c:165:19: warning: 'vring_map_one_sg' defined
but not used [-Wunused-function]
static dma_addr_t vring_map_one_sg(const struct vring_virtqueue *vq,
Comment this function for now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 28 Jul 2016 11:15:28 +0000 (13:15 +0200)]
ARM: Add local tick_receive_broadcast_local()
Handler function is defined as void (*handler)(void)
tick_receive_broadcast is returning int instead of void
which is showed by compilation error:
arch/arm/kernel/smp.c:509:2: warning: initialization from incompatible
pointer type
S(IPI_TIMER, tick_receive_broadcast),
^
arch/arm/kernel/smp.c:509:2: warning: (near initialization for
'ipi_types[1].handler')
This patch creates local version of this function to avoid
compilation warning.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: zynqmp: Add support for 44-bit address space on AXI in DMA mode
Added dma_set_mask API with supported mask as 44bit, since GQSPI supports
maximum of 44-bit address space. With out this API, dma mapping will fail when
the memory map is beyond 32-bit address space.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The pm.c is actually the plat support.
All the secure transaction go through it.
The clocks, power domains and reset need it so
lets compile it always for zynqmp.
Also remove the ZYNQMP_PM_API dependency for reset controller.
soc: zynqmp: Add early support for the pm.c functions
Splits the current pm.c to have a init function that can be
called early and the existing probe.
This should help drivers that need the platform management
functions early
projects / zynq / linux.git / log