ARM: zynq: Add support for Zynq-7000S devices

Patch adds detection of Zynq-7000 base silicon configuration,
namely Dual or Single CPU. Device trees attempting to enable DUAL CORE
behavior on SINGLE CPU Zynq-7000S devices are prevented from corrupting
system behavior.

Detection of Dual or Single CPU is done via eFuses.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 09bdcc2dd89ff7a49e2f431d56fd74294d9bc140..957a13497ad900de70d518c58eacebf731909721 100644 (file)
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -349,6 +349,11 @@
                        syscon = <&slcr>;
                };
 
+               efuse: efuse@f800d000 {
+                       compatible = "xlnx,zynq-efuse";
+                       reg = <0xf800d000 0x20>;
+               };
+
                global_timer: timer@f8f00200 {
                        compatible = "arm,cortex-a9-global-timer";
                        reg = <0xf8f00200 0x20>;

diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
index 65c0124d224a11270d77e2fc70f03a83fd5a28bf..d0861a29b9c1454583c12c7cd073d8b84798ed93 100644 (file)
--- a/arch/arm/mach-zynq/Makefile
+++ b/arch/arm/mach-zynq/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y                          := common.o slcr.o zynq_ocm.o pm.o
+obj-y                          := common.o efuse.o slcr.o zynq_ocm.o pm.o
 
 obj-$(CONFIG_SMP)              += headsmp.o platsmp.o
 ORIG_AFLAGS := $(KBUILD_AFLAGS)

diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index ad93543758f130f1ec8531c7a9b7f293baf8e83a..6cefdb88cf79579db8de68f89472d7a653ff682c 100644 (file)
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -185,6 +185,7 @@ static void __init zynq_map_io(void)
 
 static void __init zynq_irq_init(void)
 {
+       zynq_early_efuse_init();
        zynq_early_slcr_init();
        irqchip_init();
 }

diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index 172cf2040074d1ff991aa1337bf6d8f7e1406848..ebeaa3d75a45fc30ed8263caa37f36babb9f6349 100644 (file)
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -26,6 +26,9 @@ extern void zynq_slcr_cpu_state_write(int cpu, bool die);
 extern u32 zynq_slcr_get_ocm_config(void);
 extern u32 zynq_slcr_get_device_id(void);
 
+extern bool zynq_efuse_cpu_state(int cpu);
+extern int zynq_early_efuse_init(void);
+
 #ifdef CONFIG_SMP
 extern char zynq_secondary_trampoline;
 extern char zynq_secondary_trampoline_jump;

diff --git a/arch/arm/mach-zynq/efuse.c b/arch/arm/mach-zynq/efuse.c
new file mode 100644 (file)
index 0000000..d31a582
--- /dev/null
+++ b/arch/arm/mach-zynq/efuse.c
@@ -0,0 +1,75 @@
+/*
+ * Xilinx EFUSE driver
+ *
+ * Copyright (c) 2016 Xilinx Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include "common.h"
+
+#define EFUSE_STATUS_OFFSET    0x10
+
+/* 0 means cpu1 is working, 1 means cpu1 is broken */
+#define EFUSE_STATUS_CPU_BIT   BIT(7)
+
+void __iomem *zynq_efuse_base;
+
+/**
+ * zynq_efuse_cpu_state - Read/write cpu state
+ * @cpu:       cpu number
+ *
+ * Return: true if cpu is running, false if cpu is broken
+ */
+bool zynq_efuse_cpu_state(int cpu)
+{
+       u32 state;
+
+       if (!cpu)
+               return true;
+
+       state = readl(zynq_efuse_base + EFUSE_STATUS_OFFSET);
+       state &= EFUSE_STATUS_CPU_BIT;
+
+       if (!state)
+               return true;
+
+       return false;
+}
+
+/**
+ * zynq_early_efuse_init - Early efuse init function
+ *
+ * Return:     0 on success, negative errno otherwise.
+ *
+ * Called very early during boot from platform code.
+ */
+int __init zynq_early_efuse_init(void)
+{
+       struct device_node *np;
+
+       np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-efuse");
+       if (!np) {
+               pr_err("%s: no efuse node found\n", __func__);
+               BUG();
+       }
+
+       zynq_efuse_base = of_iomap(np, 0);
+       if (!zynq_efuse_base) {
+               pr_err("%s: Unable to map I/O memory\n", __func__);
+               BUG();
+       }
+
+       np->data = (__force void *)zynq_efuse_base;
+
+       pr_info("%s mapped to %p\n", np->name, zynq_efuse_base);
+
+       of_node_put(np);
+
+       return 0;
+}

diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c
index 37938d180b7a888403bf4e1fb81dcb8ae8e3d96f..74797a23389c179f0002d1d37b1a277c7da86717 100644 (file)
--- a/arch/arm/mach-zynq/platsmp.c
+++ b/arch/arm/mach-zynq/platsmp.c
@@ -89,6 +89,9 @@ EXPORT_SYMBOL(zynq_cpun_start);
 
 static int zynq_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
+       if (!zynq_efuse_cpu_state(cpu))
+               return -1;
+
        return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);
 }