Soren Brinkmann [Sat, 10 Nov 2012 02:00:52 +0000 (18:00 -0800)]
arm: zynq: Migrate I2C slaves to DT
Use the device tree to describe the I2C bus for the zc702/zc706 platform.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: John Linn <john.linn@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 13 Nov 2012 13:15:00 +0000 (14:15 +0100)]
net: xilinx_emacps: Use dev_err with proper device link
Warning log:
drivers/net/ethernet/xilinx/xilinx_emacps.c: In function 'xemacps_mii_init':
drivers/net/ethernet/xilinx/xilinx_emacps.c:934:1: warning:
label 'err_out_unregister_bus' defined but not used [-Wunused-label]
Rob Herring [Mon, 5 Nov 2012 18:13:14 +0000 (10:13 -0800)]
ARM: kill off arch_is_coherent
With ixp2xxx removed, there are no platforms that define arch_is_coherent,
so the last occurrences of arch_is_coherent can be removed. Any new
platform with coherent i/o should use coherent dma mapping functions.
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Rob Herring [Mon, 5 Nov 2012 18:13:13 +0000 (10:13 -0800)]
ARM: add coherent iommu dma ops
Remove arch_is_coherent() from iommu dma ops and implement separate
coherent ops functions.
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Rob Herring [Mon, 5 Nov 2012 18:13:12 +0000 (10:13 -0800)]
ARM: add coherent dma ops
arch_is_coherent is problematic as it is a global symbol. This
doesn't work for multi-platform kernels or platforms which can support
per device coherent DMA.
This adds arm_coherent_dma_ops to be used for devices which connected
coherently (i.e. to the ACP port on Cortex-A9 or A15). The arm_dma_ops
are modified at boot when arch_is_coherent is true.
Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Michal Simek [Mon, 12 Nov 2012 15:23:35 +0000 (16:23 +0100)]
watchdog: xilinx_wdtps: Fix section mismatch
Warning log:
WARNING: drivers/built-in.o(.data+0x9bd8): Section mismatch in reference from
the variable xwdtps_driver to the function .init.text:xwdtps_probe()
The variable xwdtps_driver references
the function __init xwdtps_probe()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 12 Nov 2012 10:32:55 +0000 (11:32 +0100)]
usb: gadget: usbps_udc: Fix section mismatch
Warning log:
WARNING: vmlinux.o(.data+0x12dc8): Section mismatch in reference from
the variable xwdtps_driver to the function .init.text:xwdtps_probe()
The variable xwdtps_driver references
the function __init xwdtps_probe()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 12 Nov 2012 10:32:27 +0000 (11:32 +0100)]
pmods: Fix section mismatch
Warning log:
WARNING: drivers/pmods/built-in.o(.devinit.text+0x1bc): Section mismatch in reference from
the function gpio_pmodoled_of_probe() to the function .init.text:add_gpio_pmodoled_device_to_bus()
The function __devinit gpio_pmodoled_of_probe() references
a function __init add_gpio_pmodoled_device_to_bus().
If add_gpio_pmodoled_device_to_bus is only used by gpio_pmodoled_of_probe then
annotate add_gpio_pmodoled_device_to_bus with a matching annotation.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 12 Nov 2012 10:30:41 +0000 (11:30 +0100)]
gpio: xilinx_gpiops: Fix section mismatch
Warning log:
WARNING: vmlinux.o(.data+0x91f0): Section mismatch in reference from
the variable xgpiops_driver to the function .init.text:xgpiops_probe()
The variable xgpiops_driver references
the function __init xgpiops_probe()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
CONFIG_COMMON_CLK is mandatory for the Zynq platform. For this
reason all conditional compiling regarding this option can be removed.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann [Mon, 12 Nov 2012 18:49:56 +0000 (10:49 -0800)]
i2c: xilinx_i2cps: Remove CONFIG_OF conditionals
CONFIG_OF is mandatory for the Zynq platform. For this reason
all conditional compiling regarding this option can be removed.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann [Mon, 12 Nov 2012 18:49:55 +0000 (10:49 -0800)]
i2c: xilinx_i2cps: Use dev_err over pr_err
Replacing uses of pr_err through dev_err.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann [Mon, 12 Nov 2012 19:58:44 +0000 (11:58 -0800)]
serial: xilinx_uartps: Fix suspend functionality
The driver's suspend/resume functions were buggy and
lacking some steps to successfully get through a suspend
and resume cycle.
The port argument passed to uart_(suspend|resume)_port() was
invalid.
The resume function now resets the hardware. There is probably a
less brutal way of getting the UART back up, but this one does
work.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann [Fri, 9 Nov 2012 02:32:53 +0000 (18:32 -0800)]
gpio: xilinx_gpiops: Update PM support
- The PM state of the device was incorrectly initialized to be
active in the probe function.
- Use the sync variants of the pm_runtime_(get|put) functions.
- Provide different functions for PM_SLEEP and PM_RUNTIME
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann [Sat, 10 Nov 2012 02:00:50 +0000 (18:00 -0800)]
arm: zynq: Add ucd9248 hwmon to zc702
The zc702 has several ucd9248 PWM controllers connected to the
PMBUS. This patch registers those devices with the driver framework,
if the corresponding driver is selected in the kernel configuration.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Acknowedging an interrupt requires to read the interrupt register
only. The write was only required to work around a bug in
the QEMU implementation of the TTC, which is fixed.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
The I2C controller read-modify-writes the XFER_SIZE register when the DATA
interrupt occurs. If my understanding of the hardware operation is correct, the
hardware is still recieving data at this time so this register is not stable
at this point. The read modify write will update the new value based on some
arithmetic done on the old value which will cause the hardware to try and read
an extra byte.
This bug is a freak occurance, so you cant replicate it (at least on real
hardware), but with a large volume of I2C transfers with a busy kernel you will
get a non trivial MTTF.
See comments added to code.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Michal Simek [Mon, 5 Nov 2012 10:51:13 +0000 (11:51 +0100)]
microblaze: Fix intc_enable_or_unmask function
Xilinx crs: CR 677091
Intc_enable_or_unmask() is called at the last stage of handle_level_irq().
This function enables the irq first (Write INTC.SIE) and clear ISR next (Write INTC.IAR).
Here¿s the code in arch/microblaze/kernel/intc.c
static void intc_enable_or_unmask(unsigned int irq)
{
unsigned long mask = 1 << irq;
pr_debug("enable_or_unmask: %d\n", irq);
out_be32(INTC_BASE + SIE, mask);
/* ack level irqs because they can't be acked during
* ack function since the handle_level_irq function
* acks the irq before calling the interrupt handler
*/
if (irq_desc[irq].status & IRQ_LEVEL)
out_be32(INTC_BASE + IAR, mask);
}
This would create problems that processor will get into a new interrupt as soon as SIE is written because the previous level interrupt has been captured by INTC.
If the description bring some puzzles, here¿s the details of how interrupt is handled for MicroBlaze after Interrupt signal is detected:
1. disable INTC (INTC.CIE = 1)
2. Acknowledge INTC (INTC.IAR = 1)
3. gets into interrupt source¿s handler, for example, timer¿s handler
4. Timer¿s interrupt handler acknowledge Timer¿s Interrupt Status (Timer.TCSR0[23] = 1), and return
5. Enable INTC (INTC.SIE = 1)
6. Acknowledge INTC (INTC.IAR = 1)
INTC continue to capture source inputs even if INTC is disabled (INTC.IER == 1).
So between the gap of step 2 and step 3, the level interrupt from source makes INTC captures a new interrupt and thus the INTC.ISR = 1 during step 3, 4, and 5.
When INTC is enabled in step 5, INTC¿s interrupt output will go high immediately.
In summary, the driver should issue step 6 before step 5.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 5 Nov 2012 17:04:33 +0000 (18:04 +0100)]
net: xilinx_emacps: Fix mdio name initialization
We are using this mdio bus description which
requires properly setup additional device level.
lp->mii_bus->id is address of device itself
but ethernet device itself is
of_get_parent(of_get_parent(lp->phy_node));
This patch fix the problem with several emacps drivers.
Reported-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: John Linn <john.linn@xilinx.com>
Jason Wu [Thu, 1 Nov 2012 10:15:58 +0000 (20:15 +1000)]
net: ethernet: emaclite: Fix compilation error with Zynq
Currently Zynq is not aware of in_be32 and out_be32 functions. So if
emaclite driver is enabled, it will get compilation error.
e.g implicit declaration of function 'in_be32'
[-Werror=implicit-function-declaration]
Jason Wu [Thu, 1 Nov 2012 10:15:56 +0000 (20:15 +1000)]
net: ethernet: axi_emac: Fix compilation error with Zynq
Currently Zynq is not aware of in_be32 and out_be32 functions. So if
axi_emac driver is enabled, it will get compilation error.
e.g implicit declaration of function 'in_be32'
[-Werror=implicit-function-declaration]
John Linn [Fri, 26 Oct 2012 19:35:16 +0000 (12:35 -0700)]
serial: xilinx_uartps: Fix bad register write in console_write
The commit:
serial: xilinx_uartps: Force enable the UART in xuartps_console_write
(sha1: d21aec67c1c782314d20b3d619e76cf8aae593dc)
caused a new bug as the write to the control register had
the offset and the value to write reversed.
Reported-by: Jason Andrews <jasona@cadence.com> Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This really smells bad. Setup lp->board_type before register_netdev
is weird. It is probably because of xemacps_mii_probe or xemacps_init_hw
function. register_netdev should be probably at different place.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The ISR currently consumes the rx buffer data and re-enables transmission
from within interrupt context. This is bad because if the interrupt
occurs again before the ISR exits, the new interrupt will be erroneously
cleared by the still completing ISR.
Simplified the ISR by just setting the completion variable and exiting with
no action. Then just looped the transmit functionality in
xilinx_spi_txrx_bufs().
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
serial: xilinx_uartps: Force enable the UART in xuartps_console_write
It is possible that under certain circumstances xuartps_console_write is entered
while the UART disabled. When this happens the code will busy loop in
xuartps_console_putchar, since the character is never written and the TXEMPTY
flag is never set. The result is a system lockup. This patch force enables the
UART for the duration of xuartps_console_write to avoid this.
Pallav Joshi [Wed, 17 Oct 2012 09:37:11 +0000 (15:07 +0530)]
Xilinx: ARM: Frame buffer driver fix for compilation error.
Fixed xylonfb-pixclk.c file for the compilation error while
using other flags than CONFIG_FB_XYLON_ZC702_PIXCLK.
Added appropriate header files to xylonfb-pixclk.c
serial: xilinx_uartps: Force enable the UART in xuartps_console_write
It is possible that under certain circumstances xuartps_console_write is entered
while the UART disabled. When this happens the code will busy loop in
xuartps_console_putchar, since the character is never written and the TXEMPTY
flag is never set. The result is a system lockup. This patch force enables the
UART for the duration of xuartps_console_write to avoid this.
Pallav Joshi [Wed, 17 Oct 2012 09:37:11 +0000 (15:07 +0530)]
Xilinx: ARM: Frame buffer driver fix for compilation error.
Fixed xylonfb-pixclk.c file for the compilation error while
using other flags than CONFIG_FB_XYLON_ZC702_PIXCLK.
Added appropriate header files to xylonfb-pixclk.c
The VDMA configuration parameter 'disable_intr' currently used
to enable specific interrupts, which does not denote the name
'disable_intr'. This patch modifies the logic.
SrikanthT [Fri, 12 Oct 2012 18:59:55 +0000 (00:29 +0530)]
Xilinx: ARM: DMA: Fixed issue with VDMA when operating in circular mode
Parameters 'direction' & 'park_frm' of DMA configuration structure
are uninitialized, as a result, it looks for park pointer update
when operating in circular mode. They are now initialized to fix
this issue.
Jason Wu [Wed, 24 Oct 2012 07:03:10 +0000 (17:03 +1000)]
mtd: m25p80: Enable four byte mode for PS_QSPI
Enable mtd 4 byte mode if the mtd.size is larger than 16MB for PS_QSPI
controller
This hack bypass the 4 byte mode configuration for the qspi flash chip.
It sets mtd to 4 byte mode but leave the qspi flash in 3 byte mode (or
flash default mode). This can be issue when two 32MB flash is configured
as dual mode, it will not work if the qspi flash chip is configured in 3
byte mode as it require 4 byte addressing to access the entire 32MB.