]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
drm: xilinx: dp: Add macros for misc0
authorTejas Upadhyay <tejas.upadhyay@xilinx.com>
Tue, 6 Jun 2017 18:15:35 +0000 (11:15 -0700)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 21 Jun 2017 14:28:30 +0000 (16:28 +0200)
Added following macros:
        -XILINX_DP_MISC0_FORMAT_MASK
        -XILINX_DP_MISC0_BPC_MASK

Signed-off-by: Tejas Upadhyay <tejasu@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/gpu/drm/xilinx/xilinx_drm_dp.c

index a066b8d107c1db445114febf17ca9cd728c8076c..d41b001485ea7914e8ceacb36455f4a7ee714008 100644 (file)
@@ -227,11 +227,13 @@ MODULE_PARM_DESC(aux_timeout_ms,
 #define XILINX_DP_MISC0_RGB                            (0)
 #define XILINX_DP_MISC0_YCRCB_422                      (5 << 1)
 #define XILINX_DP_MISC0_YCRCB_444                      (6 << 1)
+#define XILINX_DP_MISC0_FORMAT_MASK                    0xe
 #define XILINX_DP_MISC0_BPC_6                          (0 << 5)
 #define XILINX_DP_MISC0_BPC_8                          (1 << 5)
 #define XILINX_DP_MISC0_BPC_10                         (2 << 5)
 #define XILINX_DP_MISC0_BPC_12                         (3 << 5)
 #define XILINX_DP_MISC0_BPC_16                         (4 << 5)
+#define XILINX_DP_MISC0_BPC_MASK                       0xe0
 #define XILINX_DP_MISC1_Y_ONLY                         (1 << 7)
 
 #define DP_REDUCED_BIT_RATE                            162000