]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
v4l: xilinx: scd: Store channel registers address in iomem field
authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Wed, 3 Apr 2019 20:01:51 +0000 (13:01 -0700)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 5 Apr 2019 11:03:49 +0000 (13:03 +0200)
Store the channel registers address instead of the base offset in the
iomem field of the channel structures. This allows accessing the channel
registers without having to compute the offset each time.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Satish Kumar Nagireddy <satish.nagireddy.nagireddy@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
drivers/media/platform/xilinx/xilinx-scenechange-channel.c
drivers/media/platform/xilinx/xilinx-scenechange-dma.c
drivers/media/platform/xilinx/xilinx-scenechange.h

index 25e31373fdc47b643b017010e72e47846c079036..bff7f06dd5195805b7619bffa6d811dc0580df86 100644 (file)
@@ -157,38 +157,32 @@ static int xscd_chan_get_vid_fmt(u32 media_bus_fmt, bool memory_based)
 /**
  * xscd_chan_configure_params - Program parameters to HW registers
  * @chan: Driver specific channel struct pointer
- * @chan_offset: Register offset for a channel
  */
-static void xscd_chan_configure_params(struct xscd_chan *chan,
-                                      u32 chan_offset)
+static void xscd_chan_configure_params(struct xscd_chan *chan)
 {
        u32 vid_fmt, stride;
 
-       xscd_write(chan->iomem, XSCD_WIDTH_OFFSET + chan_offset,
-                  chan->format.width);
+       xscd_write(chan->iomem, XSCD_WIDTH_OFFSET, chan->format.width);
 
        /* Stride is required only for memory based IP, not for streaming IP */
        if (chan->xscd->memory_based) {
                stride = roundup(chan->format.width, XSCD_BYTE_ALIGN);
-               xscd_write(chan->iomem, XSCD_STRIDE_OFFSET + chan_offset,
-                          stride);
+               xscd_write(chan->iomem, XSCD_STRIDE_OFFSET, stride);
        }
 
-       xscd_write(chan->iomem, XSCD_HEIGHT_OFFSET + chan_offset,
-                  chan->format.height);
+       xscd_write(chan->iomem, XSCD_HEIGHT_OFFSET, chan->format.height);
 
        /* Hardware video format */
        vid_fmt = xscd_chan_get_vid_fmt(chan->format.code,
                                        chan->xscd->memory_based);
-       xscd_write(chan->iomem, XSCD_VID_FMT_OFFSET + chan_offset, vid_fmt);
+       xscd_write(chan->iomem, XSCD_VID_FMT_OFFSET, vid_fmt);
 
        /*
         * This is the vertical subsampling factor of the input image. Instead
         * of sampling every line to calculate the histogram, IP uses this
         * register value to sample only specific lines of the frame.
         */
-       xscd_write(chan->iomem, XSCD_SUBSAMPLE_OFFSET + chan_offset,
-                  XSCD_V_SUBSAMPLING);
+       xscd_write(chan->iomem, XSCD_SUBSAMPLE_OFFSET, XSCD_V_SUBSAMPLING);
 }
 
 /* -----------------------------------------------------------------------------
@@ -198,7 +192,6 @@ static int xscd_s_stream(struct v4l2_subdev *subdev, int enable)
 {
        struct xscd_chan *chan = to_xscd_chan(subdev);
        unsigned long flags;
-       u32 chan_offset;
 
        /* TODO: Re-organise shared data in a better way */
        chan->dmachan.en = enable;
@@ -206,8 +199,7 @@ static int xscd_s_stream(struct v4l2_subdev *subdev, int enable)
        spin_lock_irqsave(&chan->dmachan.lock, flags);
 
        if (chan->xscd->memory_based) {
-               chan_offset = chan->id * XSCD_CHAN_OFFSET;
-               xscd_chan_configure_params(chan, chan_offset);
+               xscd_chan_configure_params(chan);
                if (enable) {
                        if (!chan->xscd->active_streams) {
                                chan->dmachan.valid_interrupt = true;
@@ -226,7 +218,7 @@ static int xscd_s_stream(struct v4l2_subdev *subdev, int enable)
        } else {
                /* Streaming based */
                if (enable) {
-                       xscd_chan_configure_params(chan, chan->id);
+                       xscd_chan_configure_params(chan);
                        xscd_dma_reset(&chan->dmachan);
                        xscd_dma_chan_enable(&chan->dmachan, BIT(chan->id));
                        xscd_dma_start(&chan->dmachan);
@@ -325,8 +317,7 @@ static void xscd_event_notify(struct xscd_chan *chan)
        u32 *eventdata;
        u32 sad, scd_threshold;
 
-       sad = xscd_read(chan->iomem, XSCD_SAD_OFFSET +
-                       (chan->id * XSCD_CHAN_OFFSET));
+       sad = xscd_read(chan->iomem, XSCD_SAD_OFFSET);
        sad = (sad * XSCD_V_SUBSAMPLING * MULTIPLICATION_FACTOR) /
               (chan->format.width * chan->format.height);
        eventdata = (u32 *)&chan->event.u.data;
@@ -380,9 +371,9 @@ int xscd_chan_init(struct xscd_device *xscd, unsigned int chan_id,
        mutex_init(&chan->lock);
        chan->xscd = xscd;
        chan->id = chan_id;
-       chan->iomem = chan->xscd->iomem;
+       chan->iomem = chan->xscd->iomem + chan->id * XSCD_CHAN_OFFSET;
        chan->dmachan.id = chan->id;
-       chan->dmachan.iomem = chan->xscd->iomem;
+       chan->dmachan.iomem = chan->iomem;
 
        xscd->channels[chan->id] = &chan->dmachan;
 
index 6f94582d60fc8deab1272dc4fec4626df0d4288d..d9c9c84d063c7b1582508ef27773b40529763b28 100644 (file)
@@ -116,7 +116,7 @@ static dma_cookie_t xscd_dma_tx_submit(struct dma_async_tx_descriptor *tx)
  */
 void xscd_dma_chan_enable(struct xscd_dma_chan *chan, int chan_en)
 {
-       xscd_write(chan->iomem, XSCD_CHAN_EN_OFFSET, chan_en);
+       xscd_write(chan->xscd->iomem, XSCD_CHAN_EN_OFFSET, chan_en);
 }
 
 /**
@@ -140,7 +140,6 @@ static void xscd_dma_complete_descriptor(struct xscd_dma_chan *chan)
 void xscd_dma_start_transfer(struct xscd_dma_chan *chan)
 {
        struct xscd_dma_tx_descriptor *desc;
-       u32 chanoffset = chan->id * XSCD_CHAN_OFFSET;
 
        if (!chan->en)
                return;
@@ -165,8 +164,7 @@ void xscd_dma_start_transfer(struct xscd_dma_chan *chan)
                                struct xscd_dma_tx_descriptor, node);
 
        /* Start the transfer */
-       xscd_write(chan->iomem, XSCD_ADDR_OFFSET + chanoffset,
-                  desc->sw.luma_plane_addr);
+       xscd_write(chan->iomem, XSCD_ADDR_OFFSET, desc->sw.luma_plane_addr);
 
        list_del(&desc->node);
        chan->staged_desc = desc;
@@ -356,10 +354,11 @@ void xscd_dma_halt(struct xscd_dma_chan *chan)
        struct xscd_device *xscd = chan->xscd;
 
        if (xscd->memory_based)
-               xscd_clr(chan->iomem, XSCD_CTRL_OFFSET, XSCD_CTRL_AP_START);
+               xscd_clr(chan->xscd->iomem, XSCD_CTRL_OFFSET,
+                        XSCD_CTRL_AP_START);
        else
                /* Streaming based */
-               xscd_clr(chan->iomem, XSCD_CTRL_OFFSET,
+               xscd_clr(chan->xscd->iomem, XSCD_CTRL_OFFSET,
                         XSCD_CTRL_AP_START | XSCD_CTRL_AUTO_RESTART);
 
        chan->idle = true;
@@ -374,10 +373,11 @@ void xscd_dma_start(struct xscd_dma_chan *chan)
        struct xscd_device *xscd = chan->xscd;
 
        if (xscd->memory_based)
-               xscd_set(chan->iomem, XSCD_CTRL_OFFSET, XSCD_CTRL_AP_START);
+               xscd_set(chan->xscd->iomem, XSCD_CTRL_OFFSET,
+                        XSCD_CTRL_AP_START);
        else
                /* Streaming based */
-               xscd_set(chan->iomem, XSCD_CTRL_OFFSET,
+               xscd_set(chan->xscd->iomem, XSCD_CTRL_OFFSET,
                         XSCD_CTRL_AP_START | XSCD_CTRL_AUTO_RESTART);
 
        chan->idle = false;
@@ -389,8 +389,8 @@ void xscd_dma_start(struct xscd_dma_chan *chan)
  */
 void xscd_dma_reset(struct xscd_dma_chan *chan)
 {
-       xscd_write(chan->iomem, XSCD_IE_OFFSET, XSCD_IE_AP_DONE);
-       xscd_write(chan->iomem, XSCD_GIE_OFFSET, XSCD_GIE_EN);
+       xscd_write(chan->xscd->iomem, XSCD_IE_OFFSET, XSCD_IE_AP_DONE);
+       xscd_write(chan->xscd->iomem, XSCD_GIE_OFFSET, XSCD_GIE_EN);
 }
 
 /**
index a3881443599d907228cdb3db2414671057b79b23..d18084804719d8f2755f89fd7a3a2a711778acd0 100644 (file)
@@ -103,7 +103,7 @@ to_xscd_dma_tx_descriptor(struct dma_async_tx_descriptor *tx)
 /**
  * struct xscd_dma_chan - DMA Channel structure
  * @xscd: SCD device
- * @iomem: device I/O register space remapped to kernel virtual memory
+ * @iomem: I/O memory address of the channel registers
  * @lock: Descriptor operation lock
  * @chan_node: Member of a list of framebuffer channel instances
  * @pending_list: Descriptors waiting
@@ -144,7 +144,7 @@ static inline struct xscd_dma_chan *to_xscd_dma_chan(struct dma_chan *chan)
 /**
  * struct xscd_chan - Video Stream structure
  * @id: scene change channel ID
- * @iomem: device I/O register space remapped to kernel virtual memory
+ * @iomem: I/O memory address of the channel registers
  * @xscd: SCD device
  * @subdev: V4L2 subdevice
  * @pads: media pads