Documentation: DT: dwc3: update for CCI support for USB

This patch adds documentation in DWC3 device-tree bindings for enabling
the DMA coherency in USB.

Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt b/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
index fb42a141470887188cf1f3e58754034320efabd8..a6fcf9554640df9a41cb7ec469e75d887bb5ed17 100644 (file)
--- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
@@ -2,6 +2,7 @@ Xilinx SuperSpeed DWC3 USB SoC controller
 
 Required properties:
 - compatible:  Should contain "xlnx,zynqmp-dwc3"
+- reg:         Base address and length of the register control block
 - clocks:      A list of phandles for the clocks listed in clock-names
 - clock-names: Should contain the following:
   "bus_clk"     Master/Core clock, have to be >= 125 MHz for SS
@@ -17,6 +18,11 @@ Optional properties for xlnx,zynqmp-dwc3:
 - nvmem-cells:       list of phandle to the nvmem data cells.
 - nvmem-cell-names:  Names for the each nvmem-cells specified.
 
+Optional properties for snps,dwc3:
+- dma-coherent:        Enable this flag if CCI is enabled in design. Adding this
+               flag configures Global SoC bus Configuration Register and
+               Xilinx USB 3.0 IP - USB coherency register to enable CCI.
+
 Example device node:
 
                usb@0 {
@@ -24,6 +30,7 @@ Example device node:
                        #size-cells = <0x1>;
                        status = "okay";
                        compatible = "xlnx,zynqmp-dwc3";
+                       reg = <0x0 0xff9d0000 0x0 0x100>;
                        clock-names = "bus_clk" "ref_clk";
                        clocks = <&clk125>, <&clk125>;
                        ranges;
@@ -35,5 +42,6 @@ Example device node:
                                reg = <0x0 0xfe200000 0x40000>;
                                interrupts = <0x0 0x41 0x4>;
                                dr_mode = "host";
+                               dma-coherent;
                        };
                };