case IOCTL_GET_PLL_FRAC_MODE:
case IOCTL_SET_PLL_FRAC_DATA:
case IOCTL_GET_PLL_FRAC_DATA:
+ case IOCTL_SET_TAPDELAY_BYPASS:
case IOCTL_SET_SGMII_MODE:
case IOCTL_SD_DLL_RESET:
case IOCTL_SET_SD_TAPDELAY:
};
enum pm_ioctl_id {
- IOCTL_SET_SGMII_MODE = 5,
+ IOCTL_SET_TAPDELAY_BYPASS = 4,
+ IOCTL_SET_SGMII_MODE,
IOCTL_SD_DLL_RESET,
IOCTL_SET_SD_TAPDELAY,
/* Ioctl for clock driver */
PM_PINCTRL_DRIVE_STRENGTH_12MA,
};
+enum tap_delay_signal_type {
+ PM_TAPDELAY_NAND_DQS_IN,
+ PM_TAPDELAY_NAND_DQS_OUT,
+ PM_TAPDELAY_QSPI,
+ PM_TAPDELAY_MAX,
+};
+
+enum tap_delay_bypass_ctrl {
+ PM_TAPDELAY_BYPASS_DISABLE,
+ PM_TAPDELAY_BYPASS_ENABLE,
+};
+
enum sgmii_mode {
PM_SGMII_DISABLE,
PM_SGMII_ENABLE,