net: macb: Change interrupt and napi enable order in open

Current order in open:
-> Enable interrupts (macb_init_hw)
-> Enable NAPI
-> Start PHY

Sequence of RX handling:
-> RX interrupt occurs
-> Interrupt is cleared and interrupt bits disabled in handler
-> NAPI is scheduled
-> In NAPI, RX budget is processed and RX interrupts are re-enabled

With the above, on QEMU or fixed link setups (where PHY state doesn't
matter), there's a chance macb RX interrupt occurs before NAPI is
enabled. This will result in NAPI being scheduled before it is enabled.
Fix this macb open by changing the order.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 41f7888223ff2616d96774125a480471470065a6..401a6c5f2c839fa7b9334e2c1cd5474045fcb52b 100644 (file)
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -2586,12 +2586,12 @@ static int macb_open(struct net_device *dev)
                return err;
        }
 
-       bp->macbgem_ops.mog_init_rings(bp);
-       macb_init_hw(bp);
-
        for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue)
                napi_enable(&queue->napi);
 
+       bp->macbgem_ops.mog_init_rings(bp);
+       macb_init_hw(bp);
+
        /* schedule a link state check */
        phy_start(dev->phydev);