dmaengine: xilinx_dma: Fix 64-bit simple AXIDMA transfer

In the AXI DMA simple mode also pass MSB bits of buffer address to
xilinx_write function. This fixes simple DMA operation mode using
64-bit addressing. It also modifies CDMA simple mode implementation
to use helper macro for preparing dma address.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 4e5d15ab158417d27e52fe618b8a877004925341..09fbd51212fbc9cd4bf66afc706aef613c047b17 100644 (file)
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -1254,10 +1254,10 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan)
 
                hw = &segment->hw;
 
-               xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, (dma_addr_t)
-                            ((u64)hw->src_addr_msb << 32 | hw->src_addr));
-               xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, (dma_addr_t)
-                            ((u64)hw->dest_addr_msb << 32 | hw->dest_addr));
+               xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
+                            xilinx_prep_dma_addr_t(hw->src_addr));
+               xilinx_write(chan, XILINX_CDMA_REG_DSTADDR,
+                            xilinx_prep_dma_addr_t(hw->dest_addr));
 
                /* Start the transfer */
                dma_ctrl_write(chan, XILINX_DMA_REG_BTT,
@@ -1360,7 +1360,8 @@ static void xilinx_dma_start_transfer(struct xilinx_dma_chan *chan)
                                           node);
                hw = &segment->hw;
 
-               xilinx_write(chan, XILINX_DMA_REG_SRCDSTADDR, hw->buf_addr);
+               xilinx_write(chan, XILINX_DMA_REG_SRCDSTADDR,
+                            xilinx_prep_dma_addr_t(hw->buf_addr));
 
                /* Start the transfer */
                dma_ctrl_write(chan, XILINX_DMA_REG_BTT,