Added dts entry for Zynq PL330 amba device.
Signed-off-by: Naveen Mamindlapalli <naveenm@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
interrupts = <0 7 4>;
interrupt-parent = <&gic>;
};
+ ps7_dma_s: ps7-dma@f8003000 {
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ arm,primecell-periphid = <0x41330>;
+ compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
+ interrupt-parent = <&gic>;
+ interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
+ reg = < 0xf8003000 0x1000 >;
+ } ;
};
};
interrupts = <0 7 4>;
interrupt-parent = <&gic>;
};
+ ps7_dma_s: ps7-dma@f8003000 {
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ arm,primecell-periphid = <0x41330>;
+ compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
+ interrupt-parent = <&gic>;
+ interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
+ reg = < 0xf8003000 0x1000 >;
+ } ;
};
};
interrupts = <0 8 4>;
interrupt-parent = <&gic>;
};
+ ps7_dma_s: ps7-dma@f8003000 {
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ arm,primecell-periphid = <0x41330>;
+ compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
+ interrupt-parent = <&gic>;
+ interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
+ reg = < 0xf8003000 0x1000 >;
+ } ;
};
};
interrupts = <0 20 4>;
interrupt-parent = <&gic>;
};
+ ps7_dma_s: ps7-dma@f8003000 {
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ arm,primecell-periphid = <0x41330>;
+ compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
+ interrupt-parent = <&gic>;
+ interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
+ reg = < 0xf8003000 0x1000 >;
+ } ;
};
};
interrupts = <0 20 4>;
interrupt-parent = <&gic>;
};
+ ps7_dma_s: ps7-dma@f8003000 {
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ arm,primecell-periphid = <0x41330>;
+ compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
+ interrupt-parent = <&gic>;
+ interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
+ reg = < 0xf8003000 0x1000 >;
+ } ;
};
};
interrupts = <0 20 4>;
interrupt-parent = <&gic>;
};
+ ps7_dma_s: ps7-dma@f8003000 {
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ arm,primecell-periphid = <0x41330>;
+ compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
+ interrupt-parent = <&gic>;
+ interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
+ reg = < 0xf8003000 0x1000 >;
+ } ;
};
};
device_type = "memory";
reg = < 0x0 0x20000000 >;
} ;
- ps7_axi_interconnect_0: axi@0 {
+ ps7_axi_interconnect_0: amba@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
reg = < 0xf8007000 0x1000 >;
} ;
ps7_dma_s: ps7-dma@f8003000 {
- compatible = "xlnx,ps7-dma-1.00.a", "arm,pl330";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ arm,primecell-periphid = <0x41330>;
+ compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
interrupt-parent = <&ps7_scugic_0>;
interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
reg = < 0xf8003000 0x1000 >;