net: ethernet: Correcting the offset for EP register in tsn shaper

Correcting the register offset relative to base address of Endpoint

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/net/ethernet/xilinx/xilinx_tsn_shaper.h b/drivers/net/ethernet/xilinx/xilinx_tsn_shaper.h
index 587862d88aefe1a4dc894067839afa612ab7925a..b86a39f8be63ff3dc4380b6626d9d8013726a664 100644 (file)
--- a/drivers/net/ethernet/xilinx/xilinx_tsn_shaper.h
+++ b/drivers/net/ethernet/xilinx/xilinx_tsn_shaper.h
@@ -49,7 +49,7 @@ enum hw_port {
 };
 
                             /* EP */ /* TEMAC1 */ /* TEMAC2*/
-static u32 qbv_reg_map[3] = { 0x16000,   0x14000,     0x14000 };
+static u32 qbv_reg_map[3] = { 0x0,   0x14000,     0x14000 };
 
 /* 0x14000     0x14FFC Time Schedule Registers (Control & Status)
  * 0x15000     0x15FFF Time Schedule Control List Entries