+++ /dev/null
-/*
- * Device Tree Generator version: 1.3
- *
- * (C) Copyright 2007-2008 Xilinx, Inc.
- * (C) Copyright 2007-2009 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * CAUTION: This file is automatically generated by libgen.
- * Version: Xilinx EDK 12.4 EDK_MS4.81d
- *
- * XPS project directory: device-tree_bsp_0
- */
-
-/dts-v1/;
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "xlnx,microblaze";
- model = "testing";
- DDR3_SDRAM: memory@40000000 {
- device_type = "memory";
- reg = < 0x40000000 0x8000000 >;
- } ;
- aliases {
- ethernet0 = &Soft_Ethernet_MAC;
- serial0 = &RS232_Uart_1;
- } ;
- chosen {
- bootargs = "console=ttyS0 root=/dev/ram";
- linux,stdout-path = "/axi@1/serial@84000000";
- } ;
- cpus {
- #address-cells = <1>;
- #cpus = <0x1>;
- #size-cells = <0>;
- microblaze_0: cpu@0 {
- clock-frequency = <100000000>;
- compatible = "xlnx,microblaze-8.00.b";
- d-cache-baseaddr = <0x40000000>;
- d-cache-highaddr = <0x4fffffff>;
- d-cache-line-size = <0x20>;
- d-cache-size = <0x2000>;
- device_type = "cpu";
- i-cache-baseaddr = <0x40000000>;
- i-cache-highaddr = <0x4fffffff>;
- i-cache-line-size = <0x20>;
- i-cache-size = <0x2000>;
- model = "microblaze,8.00.b";
- reg = <0>;
- timebase-frequency = <100000000>;
- xlnx,addr-tag-bits = <0xf>;
- xlnx,allow-dcache-wr = <0x1>;
- xlnx,allow-icache-wr = <0x1>;
- xlnx,area-optimized = <0x0>;
- xlnx,branch-target-cache-size = <0x0>;
- xlnx,cache-byte-size = <0x2000>;
- xlnx,d-axi = <0x1>;
- xlnx,d-lmb = <0x1>;
- xlnx,d-plb = <0x0>;
- xlnx,data-size = <0x20>;
- xlnx,dcache-addr-tag = <0xf>;
- xlnx,dcache-always-used = <0x1>;
- xlnx,dcache-byte-size = <0x2000>;
- xlnx,dcache-data-width = <0x0>;
- xlnx,dcache-force-tag-lutram = <0x0>;
- xlnx,dcache-interface = <0x0>;
- xlnx,dcache-line-len = <0x8>;
- xlnx,dcache-use-fsl = <0x0>;
- xlnx,dcache-use-writeback = <0x0>;
- xlnx,dcache-victims = <0x0>;
- xlnx,debug-enabled = <0x1>;
- xlnx,div-zero-exception = <0x0>;
- xlnx,dynamic-bus-sizing = <0x1>;
- xlnx,ecc-use-ce-exception = <0x0>;
- xlnx,edge-is-positive = <0x1>;
- xlnx,endianness = <0x1>;
- xlnx,family = "spartan6";
- xlnx,fault-tolerant = <0x0>;
- xlnx,fpu-exception = <0x0>;
- xlnx,freq = <0x5f5e100>;
- xlnx,fsl-data-size = <0x20>;
- xlnx,fsl-exception = <0x0>;
- xlnx,fsl-links = <0x0>;
- xlnx,i-axi = <0x0>;
- xlnx,i-lmb = <0x1>;
- xlnx,i-plb = <0x0>;
- xlnx,icache-always-used = <0x1>;
- xlnx,icache-data-width = <0x0>;
- xlnx,icache-force-tag-lutram = <0x0>;
- xlnx,icache-interface = <0x0>;
- xlnx,icache-line-len = <0x8>;
- xlnx,icache-streams = <0x0>;
- xlnx,icache-use-fsl = <0x0>;
- xlnx,icache-victims = <0x0>;
- xlnx,ill-opcode-exception = <0x1>;
- xlnx,instance = "microblaze_0";
- xlnx,interconnect = <0x2>;
- xlnx,interconnect-m-axi-dc-read-issuing = <0x2>;
- xlnx,interconnect-m-axi-dc-write-issuing = <0x20>;
- xlnx,interconnect-m-axi-dp-read-issuing = <0x1>;
- xlnx,interconnect-m-axi-dp-write-issuing = <0x1>;
- xlnx,interconnect-m-axi-ic-read-issuing = <0x2>;
- xlnx,interconnect-m-axi-ip-read-issuing = <0x1>;
- xlnx,interrupt-is-edge = <0x0>;
- xlnx,mmu-dtlb-size = <0x2>;
- xlnx,mmu-itlb-size = <0x2>;
- xlnx,mmu-tlb-access = <0x3>;
- xlnx,mmu-zones = <0x2>;
- xlnx,number-of-pc-brk = <0x1>;
- xlnx,number-of-rd-addr-brk = <0x0>;
- xlnx,number-of-wr-addr-brk = <0x0>;
- xlnx,opcode-0x0-illegal = <0x1>;
- xlnx,optimization = <0x0>;
- xlnx,pvr = <0x2>;
- xlnx,pvr-user1 = <0x0>;
- xlnx,pvr-user2 = <0x0>;
- xlnx,reset-msr = <0x0>;
- xlnx,sco = <0x0>;
- xlnx,stream-interconnect = <0x0>;
- xlnx,unaligned-exceptions = <0x1>;
- xlnx,use-barrel = <0x1>;
- xlnx,use-branch-target-cache = <0x0>;
- xlnx,use-dcache = <0x1>;
- xlnx,use-div = <0x0>;
- xlnx,use-ext-brk = <0x1>;
- xlnx,use-ext-nm-brk = <0x1>;
- xlnx,use-extended-fsl-instr = <0x0>;
- xlnx,use-fpu = <0x0>;
- xlnx,use-hw-mul = <0x1>;
- xlnx,use-icache = <0x1>;
- xlnx,use-interrupt = <0x1>;
- xlnx,use-mmu = <0x3>;
- xlnx,use-msr-instr = <0x1>;
- xlnx,use-pcmp-instr = <0x1>;
- } ;
- } ;
- AXI_Lite: axi@1 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "xlnx,axi-interconnect-1.01.a", "simple-bus";
- ranges ;
- AXI_DMA_Ethernet: axi-dma@80000000 {
- compatible = "xlnx,axi-dma-2.00.a";
- interrupt-parent = <&Interrupt_Cntlr>;
- interrupts = < 0 2 1 2 >;
- reg = < 0x80000000 0x10000 >;
- xlnx,axi-prmry-aclk-freq-hz = <0x5f5e100>;
- xlnx,axi-scndry-aclk-freq-hz = <0x5f5e100>;
- xlnx,dlytmr-resolution = <0x4e2>;
- xlnx,family = "spartan6";
- xlnx,include-mm2s = <0x1>;
- xlnx,include-mm2s-dre = <0x1>;
- xlnx,include-s2mm = <0x1>;
- xlnx,include-s2mm-dre = <0x1>;
- xlnx,interconnect-m-axi-mm2s-read-issuing = <0x4>;
- xlnx,interconnect-m-axi-s2mm-write-issuing = <0x4>;
- xlnx,interconnect-s-axi-lite-masters = "microblaze_0.M_AXI_DP";
- xlnx,mm2s-burst-size = <0x10>;
- xlnx,prmry-is-aclk-async = <0x0>;
- xlnx,s-axi-lite-addr-width = <0x20>;
- xlnx,s-axi-lite-data-width = <0x20>;
- xlnx,s-axi-lite-protocol = "AXI4LITE";
- xlnx,s-axi-lite-supports-read = <0x1>;
- xlnx,s-axi-lite-supports-write = <0x1>;
- xlnx,s2mm-burst-size = <0x10>;
- xlnx,sg-include-desc-queue = <0x1>;
- xlnx,sg-include-stscntrl-strm = <0x1>;
- xlnx,sg-length-width = <0x10>;
- xlnx,sg-use-stsapp-length = <0x1>;
- } ;
- DIP_Switches_4Bit: gpio@81440000 {
- compatible = "xlnx,axi-gpio-1.01.a", "xlnx,xps-gpio-1.00.a";
- reg = < 0x81440000 0x10000 >;
- xlnx,all-inputs = <0x1>;
- xlnx,all-inputs-2 = <0x0>;
- xlnx,dout-default = <0x0>;
- xlnx,dout-default-2 = <0x0>;
- xlnx,family = "spartan6";
- xlnx,gpio-width = <0x4>;
- xlnx,gpio2-width = <0x20>;
- xlnx,interconnect-s-axi-masters = "microblaze_0.M_AXI_DP";
- xlnx,interrupt-present = <0x0>;
- xlnx,is-dual = <0x0>;
- xlnx,tri-default = <0xffffffff>;
- xlnx,tri-default-2 = <0xffffffff>;
- } ;
- Debug_Module: debug@84400000 {
- compatible = "xlnx,mdm-2.00.a";
- reg = < 0x84400000 0x10000 >;
- xlnx,family = "spartan6";
- xlnx,interconnect = <0x2>;
- xlnx,interconnect-s-axi-masters = "microblaze_0.M_AXI_DP";
- xlnx,jtag-chain = <0x2>;
- xlnx,mb-dbg-ports = <0x1>;
- xlnx,use-uart = <0x1>;
- } ;
- Dual_Timer_Counter: timer@83c00000 {
- compatible = "xlnx,axi-timer-1.01.a", "xlnx,xps-timer-1.00.a";
- interrupt-parent = <&Interrupt_Cntlr>;
- interrupts = < 3 0 >;
- reg = < 0x83c00000 0x10000 >;
- xlnx,count-width = <0x20>;
- xlnx,family = "spartan6";
- xlnx,gen0-assert = <0x1>;
- xlnx,gen1-assert = <0x1>;
- xlnx,interconnect-s-axi-masters = "microblaze_0.M_AXI_DP";
- xlnx,one-timer-only = <0x0>;
- xlnx,trig0-assert = <0x1>;
- xlnx,trig1-assert = <0x1>;
- } ;
- IIC_EEPROM: i2c@81600000 {
- compatible = "xlnx,axi-iic-1.01.a", "xlnx,xps-iic-2.00.a";
- interrupt-parent = <&Interrupt_Cntlr>;
- interrupts = < 5 2 >;
- reg = < 0x81600000 0x10000 >;
- xlnx,family = "spartan6";
- xlnx,gpo-width = <0x1>;
- xlnx,iic-freq = <0x186a0>;
- xlnx,interconnect-s-axi-masters = "microblaze_0.M_AXI_DP";
- xlnx,s-axi-aclk-freq-hz = <0x2faf080>;
- xlnx,scl-inertial-delay = <0x0>;
- xlnx,sda-inertial-delay = <0x0>;
- xlnx,sda-level = <0x1>;
- xlnx,ten-bit-adr = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
- m24c08 {
- compatible = "at,24c08";
- reg = <0x54>;
- };
- } ;
- Interrupt_Cntlr: interrupt-controller@81800000 {
- #interrupt-cells = <0x2>;
- compatible = "xlnx,axi-intc-1.01.a", "xlnx,xps-intc-1.00.a";
- interrupt-controller ;
- reg = < 0x81800000 0x10000 >;
- xlnx,kind-of-intr = <0x8>;
- xlnx,num-intr-inputs = <0x7>;
- } ;
- LEDs_4Bit: gpio@81420000 {
- compatible = "xlnx,axi-gpio-1.01.a", "xlnx,xps-gpio-1.00.a";
- reg = < 0x81420000 0x10000 >;
- xlnx,all-inputs = <0x0>;
- xlnx,all-inputs-2 = <0x0>;
- xlnx,dout-default = <0x0>;
- xlnx,dout-default-2 = <0x0>;
- xlnx,family = "spartan6";
- xlnx,gpio-width = <0x4>;
- xlnx,gpio2-width = <0x20>;
- xlnx,interconnect-s-axi-masters = "microblaze_0.M_AXI_DP";
- xlnx,interrupt-present = <0x0>;
- xlnx,is-dual = <0x0>;
- xlnx,tri-default = <0xffffffff>;
- xlnx,tri-default-2 = <0xffffffff>;
- } ;
- Push_Buttons_4Bit: gpio@81400000 {
- compatible = "xlnx,axi-gpio-1.01.a", "xlnx,xps-gpio-1.00.a";
- reg = < 0x81400000 0x10000 >;
- xlnx,all-inputs = <0x1>;
- xlnx,all-inputs-2 = <0x0>;
- xlnx,dout-default = <0x0>;
- xlnx,dout-default-2 = <0x0>;
- xlnx,family = "spartan6";
- xlnx,gpio-width = <0x4>;
- xlnx,gpio2-width = <0x20>;
- xlnx,interconnect-s-axi-masters = "microblaze_0.M_AXI_DP";
- xlnx,interrupt-present = <0x0>;
- xlnx,is-dual = <0x0>;
- xlnx,tri-default = <0xffffffff>;
- xlnx,tri-default-2 = <0xffffffff>;
- } ;
- RS232_Uart_1: serial@84000000 {
- clock-frequency = <50000000>;
- compatible = "xlnx,axi-uart16550-1.01.a", "xlnx,xps-uart16550-2.00.a", "ns16550";
- current-speed = <9600>;
- device_type = "serial";
- interrupt-parent = <&Interrupt_Cntlr>;
- interrupts = < 6 2 >;
- reg = < 0x84000000 0x10000 >;
- reg-offset = <0x1000>;
- reg-shift = <2>;
- xlnx,external-xin-clk-hz = <0x17d7840>;
- xlnx,family = "spartan6";
- xlnx,has-external-rclk = <0x0>;
- xlnx,has-external-xin = <0x0>;
- xlnx,interconnect-s-axi-masters = "microblaze_0.M_AXI_DP";
- xlnx,is-a-16550 = <0x1>;
- xlnx,s-axi-aclk-freq-hz = <0x2faf080>;
- xlnx,use-modem-ports = <0x0>;
- xlnx,use-user-ports = <0x0>;
- } ;
- SPI_FLASH: spi@83400000 {
- compatible = "xlnx,axi-spi-1.01.a", "xlnx,xps-spi-2.00.a";
- interrupt-parent = <&Interrupt_Cntlr>;
- interrupts = < 4 2 >;
- reg = < 0x83400000 0x10000 >;
- xlnx,family = "spartan6";
- xlnx,fifo-exist = <0x1>;
- xlnx,interconnect-s-axi-masters = "microblaze_0.M_AXI_DP";
- xlnx,num-ss-bits = <0x1>;
- xlnx,num-transfer-bits = <0x8>;
- xlnx,sck-ratio = <0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- spi_flash@0 {
- compatible = "m25p80";
- reg = <0x0>;
- spi-max-frequency = <10000000>;
- };
- } ;
- Soft_Ethernet_MAC: axi-ethernet@86000000 {
- axistream-connected = <&AXI_DMA_Ethernet>;
- compatible = "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-1.00.a";
- device_type = "network";
- interrupt-parent = <&Interrupt_Cntlr>;
- interrupts = < 2 2 >;
- local-mac-address = [ 00 0a 35 b0 6d 00 ];
- phy-handle = <&phy0>;
- reg = < 0x86000000 0x40000 >;
- xlnx,avb = <0x0>;
- xlnx,halfdup = <0x0>;
- xlnx,include-io = <0x1>;
- xlnx,mcast-extend = <0x0>;
- xlnx,phy-type = <0x1>;
- xlnx,phyaddr = <0x1>;
- xlnx,rxcsum = <0x1>;
- xlnx,rxmem = <0x1000>;
- xlnx,rxvlan-strp = <0x0>;
- xlnx,rxvlan-tag = <0x0>;
- xlnx,rxvlan-tran = <0x0>;
- xlnx,stats = <0x0>;
- xlnx,txcsum = <0x1>;
- xlnx,txmem = <0x1000>;
- xlnx,txvlan-strp = <0x0>;
- xlnx,txvlan-tag = <0x0>;
- xlnx,txvlan-tran = <0x0>;
- xlnx,type = <0x1>;
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- phy0: phy@7 {
- compatible = "marvell,88e1111";
- device_type = "ethernet-phy";
- reg = <7>;
- } ;
- } ;
- } ;
- } ;
- AXI_MM: axi@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "xlnx,axi-interconnect-1.01.a", "simple-bus";
- ranges ;
- FLASH: flash@48000000 {
- bank-width = <2>;
- compatible = "xlnx,axi-emc-1.00.a", "cfi-flash";
- reg = < 0x48000000 0x2000000 >;
- xlnx,axi-clk-period-ps = <0x2710>;
- xlnx,family = "spartan6";
- xlnx,include-datawidth-matching-0 = <0x1>;
- xlnx,include-datawidth-matching-1 = <0x0>;
- xlnx,include-datawidth-matching-2 = <0x0>;
- xlnx,include-datawidth-matching-3 = <0x0>;
- xlnx,include-negedge-ioregs = <0x0>;
- xlnx,interconnect-s-axi-mem-ar-register = <0x1>;
- xlnx,interconnect-s-axi-mem-aw-register = <0x1>;
- xlnx,interconnect-s-axi-mem-masters = "microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC";
- xlnx,max-mem-width = <0x10>;
- xlnx,mem0-type = <0x2>;
- xlnx,mem0-width = <0x10>;
- xlnx,mem1-type = <0x0>;
- xlnx,mem1-width = <0x20>;
- xlnx,mem2-type = <0x0>;
- xlnx,mem2-width = <0x20>;
- xlnx,mem3-type = <0x0>;
- xlnx,mem3-width = <0x20>;
- xlnx,num-banks-mem = <0x1>;
- xlnx,parity-type-mem-0 = <0x0>;
- xlnx,parity-type-mem-1 = <0x0>;
- xlnx,parity-type-mem-2 = <0x0>;
- xlnx,parity-type-mem-3 = <0x0>;
- xlnx,s-axi-en-reg = <0x0>;
- xlnx,s-axi-mem-addr-width = <0x20>;
- xlnx,s-axi-mem-data-width = <0x20>;
- xlnx,s-axi-mem-id-width = <0x1>;
- xlnx,s-axi-mem-protocol = "axi4";
- xlnx,s-axi-reg-addr-width = <0x20>;
- xlnx,s-axi-reg-data-width = <0x20>;
- xlnx,s-axi-reg-protocol = "axi4";
- xlnx,synch-pipedelay-0 = <0x2>;
- xlnx,synch-pipedelay-1 = <0x2>;
- xlnx,synch-pipedelay-2 = <0x2>;
- xlnx,synch-pipedelay-3 = <0x2>;
- xlnx,tavdv-ps-mem-0 = <0x1fbd0>;
- xlnx,tavdv-ps-mem-1 = <0x3a98>;
- xlnx,tavdv-ps-mem-2 = <0x3a98>;
- xlnx,tavdv-ps-mem-3 = <0x3a98>;
- xlnx,tcedv-ps-mem-0 = <0x1fbd0>;
- xlnx,tcedv-ps-mem-1 = <0x3a98>;
- xlnx,tcedv-ps-mem-2 = <0x3a98>;
- xlnx,tcedv-ps-mem-3 = <0x3a98>;
- xlnx,thzce-ps-mem-0 = <0x88b8>;
- xlnx,thzce-ps-mem-1 = <0x1b58>;
- xlnx,thzce-ps-mem-2 = <0x1b58>;
- xlnx,thzce-ps-mem-3 = <0x1b58>;
- xlnx,thzoe-ps-mem-0 = <0x1b58>;
- xlnx,thzoe-ps-mem-1 = <0x1b58>;
- xlnx,thzoe-ps-mem-2 = <0x1b58>;
- xlnx,thzoe-ps-mem-3 = <0x1b58>;
- xlnx,tlzwe-ps-mem-0 = <0x88b8>;
- xlnx,tlzwe-ps-mem-1 = <0x0>;
- xlnx,tlzwe-ps-mem-2 = <0x0>;
- xlnx,tlzwe-ps-mem-3 = <0x0>;
- xlnx,tpacc-ps-flash-0 = <0x61a8>;
- xlnx,tpacc-ps-flash-1 = <0x61a8>;
- xlnx,tpacc-ps-flash-2 = <0x61a8>;
- xlnx,tpacc-ps-flash-3 = <0x61a8>;
- xlnx,twc-ps-mem-0 = <0x32c8>;
- xlnx,twc-ps-mem-1 = <0x3a98>;
- xlnx,twc-ps-mem-2 = <0x3a98>;
- xlnx,twc-ps-mem-3 = <0x3a98>;
- xlnx,twp-ps-mem-0 = <0x11170>;
- xlnx,twp-ps-mem-1 = <0x2ee0>;
- xlnx,twp-ps-mem-2 = <0x2ee0>;
- xlnx,twp-ps-mem-3 = <0x2ee0>;
- xlnx,twph-ps-mem-0 = <0x2ee0>;
- xlnx,twph-ps-mem-1 = <0x2ee0>;
- xlnx,twph-ps-mem-2 = <0x2ee0>;
- xlnx,twph-ps-mem-3 = <0x2ee0>;
- } ;
- } ;
-} ;
projects / zynq / linux.git / commitdiff