]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
ARM: zynq: Add/Update/Sync DTs for xilinx platforms
authorMichal Simek <michal.simek@xilinx.com>
Wed, 27 Mar 2019 08:07:19 +0000 (09:07 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 3 Apr 2019 08:31:29 +0000 (10:31 +0200)
Add/Update/Sync device tree descriptions for Xilinx boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/boot/dts/zynq-7000.dtsi
arch/arm/boot/dts/zynq-cc108.dts
arch/arm/boot/dts/zynq-zc702.dts
arch/arm/boot/dts/zynq-zc706.dts
arch/arm/boot/dts/zynq-zc770-xm010.dts
arch/arm/boot/dts/zynq-zc770-xm011.dts
arch/arm/boot/dts/zynq-zc770-xm012.dts
arch/arm/boot/dts/zynq-zc770-xm013.dts
arch/arm/boot/dts/zynq-zed.dts
arch/arm/boot/dts/zynq-zturn.dts
arch/arm/boot/dts/zynq-zybo.dts

index 17872c1ae8764c83f5a5f00ab49cdbd083549af0..0cbb2ede2c0a8ef3c28de01386b056ceaa435af3 100644 (file)
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2011 - 2014 Xilinx
+ * Copyright (C) 2011 - 2015 Xilinx
  */
 
 / {
@@ -60,6 +60,7 @@
        };
 
        amba: amba {
+               u-boot,dm-pre-reloc;
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                        #size-cells = <0>;
                };
 
+               qspi: spi@e000d000 {
+                       clock-names = "ref_clk", "pclk";
+                       clocks = <&clkc 10>, <&clkc 43>;
+                       compatible = "xlnx,zynq-qspi-1.0";
+                       status = "disabled";
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 19 4>;
+                       reg = <0xe000d000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               smcc: memory-controller@e000e000 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       status = "disabled";
+                       clock-names = "memclk", "aclk";
+                       clocks = <&clkc 11>, <&clkc 44>;
+                       compatible = "arm,pl353-smc-r2p1";
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 18 4>;
+                       ranges ;
+                       reg = <0xe000e000 0x1000>;
+                       nand0: flash@e1000000 {
+                               status = "disabled";
+                               compatible = "arm,pl353-nand-r2p1";
+                               reg = <0xe1000000 0x1000000>;
+                               #address-cells = <0x1>;
+                               #size-cells = <0x1>;
+                       };
+                       nor0: flash@e2000000 {
+                               status = "disabled";
+                               compatible = "cfi-flash";
+                               reg = <0xe2000000 0x2000000>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                       };
+               };
+
                gem0: ethernet@e000b000 {
                        compatible = "cdns,zynq-gem", "cdns,gem";
                        reg = <0xe000b000 0x1000>;
                };
 
                slcr: slcr@f8000000 {
+                       u-boot,dm-pre-reloc;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
                        reg = <0xF8000000 0x1000>;
                        ranges;
                        clkc: clkc@100 {
+                               u-boot,dm-pre-reloc;
                                #clock-cells = <1>;
                                compatible = "xlnx,ps7-clkc";
-                               fclk-enable = <0>;
+                               fclk-enable = <0xf>;
                                clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
                                                "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
                                                "dci", "lqspi", "smc", "pcap", "gem0", "gem1",
 
                devcfg: devcfg@f8007000 {
                        compatible = "xlnx,zynq-devcfg-1.0";
-                       reg = <0xf8007000 0x100>;
                        interrupt-parent = <&intc>;
                        interrupts = <0 8 4>;
-                       clocks = <&clkc 12>;
-                       clock-names = "ref_clk";
+                       reg = <0xf8007000 0x100>;
+                       clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
+                       clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
                        syscon = <&slcr>;
                };
 
index 8b9ab9bba23bb133634ae70f778555f9ccb9755b..64d73ecbc592d8b8f3d9dfab0bbc571afb68e236 100644 (file)
@@ -18,6 +18,7 @@
        aliases {
                ethernet0 = &gem0;
                serial0 = &uart0;
+               spi0 = &qspi;
        };
 
        chosen {
        };
 };
 
+&qspi {
+       status = "okay";
+       is-dual = <0>;
+       num-cs = <1>;
+       flash@0 { /* 16 MB */
+               compatible = "n25q128a11";
+               reg = <0x0>;
+               spi-max-frequency = <50000000>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               partition@0 {
+                       label = "qspi-fsbl-uboot-bs";
+                       reg = <0x0 0x400000>; /* 4MB */
+               };
+               partition@400000 {
+                       label = "qspi-linux";
+                       reg = <0x400000 0x400000>; /* 4MB */
+               };
+               partition@800000 {
+                       label = "qspi-rootfs";
+                       reg = <0x800000 0x400000>; /* 4MB */
+               };
+               partition@c00000 {
+                       label = "qspi-devicetree";
+                       reg = <0xc00000 0x100000>; /* 1MB */
+               };
+               partition@d00000 {
+                       label = "qspi-scratch";
+                       reg = <0xd00000 0x200000>; /* 2MB */
+               };
+               partition@f00000 {
+                       label = "qspi-uboot-env";
+                       reg = <0xf00000 0x100000>; /* 1MB */
+               };
+       };
+};
+
 &sdhci1 {
        status = "okay";
        broken-cd ;
@@ -59,6 +99,7 @@
 };
 
 &uart0 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };
 
index 27cd6cb52f1ba33607db41ce80c6fb502a55837f..0071b2b7f853aa3e497d21c9e8b31f55a5ab5be8 100644 (file)
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: GPL-2.0+
 /*
- *  Copyright (C) 2011 - 2014 Xilinx
+ *  Copyright (C) 2011 - 2015 Xilinx
  *  Copyright (C) 2012 National Instruments Corp.
  */
 /dts-v1/;
@@ -14,7 +14,9 @@
                ethernet0 = &gem0;
                i2c0 = &i2c0;
                serial0 = &uart1;
+               spi0 = &qspi;
                mmc0 = &sdhci0;
+               usb0 = &usb0;
        };
 
        memory@0 {
                };
        };
 
-       usb_phy0: phy0 {
-               compatible = "usb-nop-xceiv";
+       usb_phy0: phy0@e0002000 {
+               compatible = "ulpi-phy";
                #phy-cells = <0>;
+               reg = <0xe0002000 0x1000>;
+               view-port = <0x0170>;
+               drv-vbus;
        };
 };
 
@@ -85,6 +90,8 @@
        phy-handle = <&ethernet_phy>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gem0_default>;
+       phy-reset-gpio = <&gpio0 11 0>;
+       phy-reset-active-low;
 
        ethernet_phy: ethernet-phy@7 {
                reg = <7>;
 &i2c0 {
        status = "okay";
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c0_default>;
+       pinctrl-1 = <&pinctrl_i2c0_gpio>;
+       scl-gpios = <&gpio0 50 0>;
+       sda-gpios = <&gpio0 51 0>;
 
        i2c-mux@74 {
                compatible = "nxp,pca9548";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <7>;
-                       hwmon@34 {
+                       hwmon@52 {
                                compatible = "ti,ucd9248";
-                               reg = <0x34>;
+                               reg = <52>;
                        };
-                       hwmon@35 {
+                       hwmon@53 {
                                compatible = "ti,ucd9248";
-                               reg = <0x35>;
+                               reg = <53>;
                        };
-                       hwmon@36 {
+                       hwmon@54 {
                                compatible = "ti,ucd9248";
-                               reg = <0x36>;
+                               reg = <54>;
                        };
                };
        };
                };
        };
 
+       pinctrl_i2c0_gpio: i2c0-gpio {
+               mux {
+                       groups = "gpio0_50_grp", "gpio0_51_grp";
+                       function = "gpio0";
+               };
+
+               conf {
+                       groups = "gpio0_50_grp", "gpio0_51_grp";
+                       slew-rate = <0>;
+                       io-standard = <1>;
+               };
+       };
+
        pinctrl_sdhci0_default: sdhci0-default {
                mux {
                        groups = "sdio0_2_grp";
        };
 };
 
+&qspi {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+       is-dual = <0>;
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               partition@qspi-fsbl-uboot {
+                       label = "qspi-fsbl-uboot";
+                       reg = <0x0 0x100000>;
+               };
+               partition@qspi-linux {
+                       label = "qspi-linux";
+                       reg = <0x100000 0x500000>;
+               };
+               partition@qspi-device-tree {
+                       label = "qspi-device-tree";
+                       reg = <0x600000 0x20000>;
+               };
+               partition@qspi-rootfs {
+                       label = "qspi-rootfs";
+                       reg = <0x620000 0x5E0000>;
+               };
+               partition@qspi-bitstream {
+                       label = "qspi-bitstream";
+                       reg = <0xC00000 0x400000>;
+               };
+       };
+};
+
 &sdhci0 {
+       u-boot,dm-pre-reloc;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sdhci0_default>;
 };
 
 &uart1 {
+       u-boot,dm-pre-reloc;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1_default>;
index 77943c16d33fcf57b3e7742a6dd2598eac81263a..1a1b03a4223d209aaead3a26a1e7336ba2179d0c 100644 (file)
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: GPL-2.0+
 /*
- *  Copyright (C) 2011 - 2014 Xilinx
+ *  Copyright (C) 2011 - 2015 Xilinx
  *  Copyright (C) 2012 National Instruments Corp.
  */
 /dts-v1/;
@@ -14,6 +14,7 @@
                ethernet0 = &gem0;
                i2c0 = &i2c0;
                serial0 = &uart1;
+               spi0 = &qspi;
                mmc0 = &sdhci0;
        };
 
                stdout-path = "serial0:115200n8";
        };
 
-       usb_phy0: phy0 {
-               compatible = "usb-nop-xceiv";
+       usb_phy0: phy0@e0002000 {
+               compatible = "ulpi-phy";
                #phy-cells = <0>;
+               reg = <0xe0002000 0x1000>;
+               view-port = <0x0170>;
+               drv-vbus;
        };
 };
 
        };
 };
 
+&qspi {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+       is-dual = <1>;
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               partition@qspi-fsbl-uboot {
+                       label = "qspi-fsbl-uboot";
+                       reg = <0x0 0x100000>;
+               };
+               partition@qspi-linux {
+                       label = "qspi-linux";
+                       reg = <0x100000 0x500000>;
+               };
+               partition@qspi-device-tree {
+                       label = "qspi-device-tree";
+                       reg = <0x600000 0x20000>;
+               };
+               partition@qspi-rootfs {
+                       label = "qspi-rootfs";
+                       reg = <0x620000 0x5E0000>;
+               };
+               partition@qspi-bitstream {
+                       label = "qspi-bitstream";
+                       reg = <0xC00000 0x400000>;
+               };
+       };
+};
+
 &sdhci0 {
+       u-boot,dm-pre-reloc;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sdhci0_default>;
 };
 
 &uart1 {
+       u-boot,dm-pre-reloc;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1_default>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb0_default>;
 };
+
+&watchdog0 {
+       reset-on-timeout;
+};
index 0dd352289a45e58150f75896a590873f66773174..8596b4ce8c91867ed0b0f814a2d83153e83c53b2 100644 (file)
@@ -15,6 +15,7 @@
                ethernet0 = &gem0;
                i2c0 = &i2c0;
                serial0 = &uart1;
+               spi0 = &qspi;
                spi1 = &spi1;
        };
 
                compatible = "atmel,24c02";
                reg = <0x52>;
        };
+};
 
+&qspi {
+       status = "okay";
+       is-dual = <0>;
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               partition@qspi-fsbl-uboot {
+                       label = "qspi-fsbl-uboot";
+                       reg = <0x0 0x100000>;
+               };
+               partition@qspi-linux {
+                       label = "qspi-linux";
+                       reg = <0x100000 0x500000>;
+               };
+               partition@qspi-device-tree {
+                       label = "qspi-device-tree";
+                       reg = <0x600000 0x20000>;
+               };
+               partition@qspi-rootfs {
+                       label = "qspi-rootfs";
+                       reg = <0x620000 0x5E0000>;
+               };
+               partition@qspi-bitstream {
+                       label = "qspi-bitstream";
+                       reg = <0xC00000 0x400000>;
+               };
+       };
 };
 
 &sdhci0 {
        status = "okay";
        num-cs = <4>;
        is-decoded-cs = <0>;
-       flash@1 {
+       flash@0 {
                compatible = "sst25wf080", "jedec,spi-nor";
                reg = <1>;
                spi-max-frequency = <1000000>;
 };
 
 &uart1 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };
 
index b7f65862c0221ae456cfd3122e1085c91f9a9990..142e7263a177edbf8bb1d62fdf1449694499f1df 100644 (file)
        };
 };
 
+&nand0 {
+       status = "okay";
+       arm,nand-cycle-t0 = <0x4>;
+       arm,nand-cycle-t1 = <0x4>;
+       arm,nand-cycle-t2 = <0x1>;
+       arm,nand-cycle-t3 = <0x2>;
+       arm,nand-cycle-t4 = <0x2>;
+       arm,nand-cycle-t5 = <0x2>;
+       arm,nand-cycle-t6 = <0x4>;
+
+       partition@nand-fsbl-uboot {
+               label = "nand-fsbl-uboot";
+               reg = <0x0 0x100000>;
+       };
+       partition@nand-linux {
+               label = "nand-linux";
+               reg = <0x100000 0x500000>;
+       };
+       partition@nand-device-tree {
+               label = "nand-device-tree";
+               reg = <0x600000 0x20000>;
+       };
+       partition@nand-rootfs {
+               label = "nand-rootfs";
+               reg = <0x620000 0x5E0000>;
+       };
+       partition@nand-bitstream {
+               label = "nand-bitstream";
+               reg = <0xC00000 0x400000>;
+       };
+};
+
+&smcc {
+       status = "okay";
+       arm,addr25 = <0x0>;
+       arm,nor-chip-sel0 = <0x0>;
+       arm,nor-chip-sel1 = <0x0>;
+       arm,sram-chip-sel0 = <0x0>;
+       arm,sram-chip-sel1 = <0x0>;
+};
+
 &spi0 {
        status = "okay";
        num-cs = <4>;
@@ -54,6 +95,7 @@
 };
 
 &uart1 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };
 
index d2359b789eb890fbd95d863ba8ccb59018af8dd9..e0e5980200cb5e581bcf1bdfb31ef916b13f9941 100644 (file)
        };
 };
 
+&nor0 {
+       status = "okay";
+       bank-width = <1>;
+       xlnx,sram-cycle-t0 = <0xb>;
+       xlnx,sram-cycle-t1 = <0xb>;
+       xlnx,sram-cycle-t2 = <0x4>;
+       xlnx,sram-cycle-t3 = <0x4>;
+       xlnx,sram-cycle-t4 = <0x3>;
+       xlnx,sram-cycle-t5 = <0x3>;
+       xlnx,sram-cycle-t6 = <0x2>;
+       partition@nor-fsbl-uboot {
+               label = "nor-fsbl-uboot";
+               reg = <0x0 0x100000>;
+       };
+       partition@nor-linux {
+               label = "nor-linux";
+               reg = <0x100000 0x500000>;
+       };
+       partition@nor-device-tree {
+               label = "nor-device-tree";
+               reg = <0x600000 0x20000>;
+       };
+       partition@nor-rootfs {
+               label = "nor-rootfs";
+               reg = <0x620000 0x5E0000>;
+       };
+       partition@nor-bitstream {
+               label = "nor-bitstream";
+               reg = <0xC00000 0x400000>;
+       };
+};
+
+&smcc {
+       status = "okay";
+       arm,addr25 = <0x1>;
+       arm,nor-chip-sel0 = <0x1>;
+       arm,nor-chip-sel1 = <0x0>;
+       arm,sram-chip-sel0 = <0x0>;
+       arm,sram-chip-sel1 = <0x0>;
+};
+
 &spi1 {
        status = "okay";
        num-cs = <4>;
 };
 
 &uart1 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };
index 4ae2c85df3a0078111f1b4aa9a24b695265cee16..d91330aab9b94687682df961b4a742d9809f89c0 100644 (file)
@@ -15,6 +15,7 @@
                ethernet0 = &gem1;
                i2c0 = &i2c1;
                serial0 = &uart0;
+               spi0 = &qspi;
                spi1 = &spi0;
        };
 
        };
 };
 
+&qspi {
+       status = "okay";
+       is-dual = <1>;
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               partition@qspi-fsbl-uboot {
+                       label = "qspi-fsbl-uboot";
+                       reg = <0x0 0x100000>;
+               };
+               partition@qspi-linux {
+                       label = "qspi-linux";
+                       reg = <0x100000 0x500000>;
+               };
+               partition@qspi-device-tree {
+                       label = "qspi-device-tree";
+                       reg = <0x600000 0x20000>;
+               };
+               partition@qspi-rootfs {
+                       label = "qspi-rootfs";
+                       reg = <0x620000 0x5E0000>;
+               };
+               partition@qspi-bitstream {
+                       label = "qspi-bitstream";
+                       reg = <0xC00000 0x400000>;
+               };
+       };
+};
+
 &spi0 {
        status = "okay";
        num-cs = <4>;
        is-decoded-cs = <0>;
-       eeprom: eeprom@2 {
+       eeprom: eeprom@0 {
                at25,byte-len = <8192>;
                at25,addr-mode = <2>;
                at25,page-size = <32>;
 };
 
 &uart0 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };
index 6a5a93aa6552ce229bf8effc3838c21672f2b91b..849240fbd0761122e39f805a798d969b1e066c96 100644 (file)
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: GPL-2.0+
 /*
- *  Copyright (C) 2011 - 2014 Xilinx
+ *  Copyright (C) 2011 - 2015 Xilinx
  *  Copyright (C) 2012 National Instruments Corp.
  */
 /dts-v1/;
@@ -13,6 +13,7 @@
        aliases {
                ethernet0 = &gem0;
                serial0 = &uart1;
+               spi0 = &qspi;
                mmc0 = &sdhci0;
        };
 
                stdout-path = "serial0:115200n8";
        };
 
-       usb_phy0: phy0 {
-               compatible = "usb-nop-xceiv";
+       usb_phy0: phy0@e0002000 {
+               compatible = "ulpi-phy";
                #phy-cells = <0>;
+               reg = <0xe0002000 0x1000>;
+               view-port = <0x0170>;
+               drv-vbus;
        };
 };
 
        };
 };
 
+&qspi {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+       is-dual = <0>;
+       num-cs = <1>;
+       flash@0 {
+               compatible = "spansion,s25fl256s", "spi-flash";
+               reg = <0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+               m25p,fast-read;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               partition@qspi-fsbl-uboot {
+                       label = "qspi-fsbl-uboot";
+                       reg = <0x0 0x100000>;
+               };
+               partition@qspi-linux {
+                       label = "qspi-linux";
+                       reg = <0x100000 0x500000>;
+               };
+               partition@qspi-device-tree {
+                       label = "qspi-device-tree";
+                       reg = <0x600000 0x20000>;
+               };
+               partition@qspi-rootfs {
+                       label = "qspi-rootfs";
+                       reg = <0x620000 0x5E0000>;
+               };
+               partition@qspi-bitstream {
+                       label = "qspi-bitstream";
+                       reg = <0xC00000 0x400000>;
+               };
+       };
+};
+
 &sdhci0 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };
 
 &uart1 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };
 
index 5ec616ebca08edddc388e79b6ecdc328d4e45963..b38704657960dd933fbcac761637234257a4c2db 100644 (file)
@@ -54,7 +54,7 @@
                        label = "K1";
                        gpios = <&gpio0 0x32 0x1>;
                        linux,code = <0x66>;
-                       wakeup-source;
+                       gpio-key,wakeup;
                        autorepeat;
                };
        };
index 755f6f109d5aa04fad5dbcc7e0ef92b09205234c..0ac54ebbdc8b478f5220f7cc5391044b2b1ffd22 100644 (file)
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: GPL-2.0+
 /*
- *  Copyright (C) 2011 - 2014 Xilinx
+ *  Copyright (C) 2011 - 2015 Xilinx
  *  Copyright (C) 2012 National Instruments Corp.
  */
 /dts-v1/;
@@ -13,6 +13,7 @@
        aliases {
                ethernet0 = &gem0;
                serial0 = &uart1;
+               spi0 = &qspi;
                mmc0 = &sdhci0;
        };
 
        };
 };
 
+&qspi {
+       u-boot,dm-pre-reloc;
+       status = "okay";
+};
+
 &sdhci0 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };
 
 &uart1 {
+       u-boot,dm-pre-reloc;
        status = "okay";
 };