arm: zynq: pm: Fix compilation error

The variable 'scu_base' had been renamed to 'zynq_scu_base'. pm.c has
not been updated accordingly. Fixing this with a simple search and
replace:
s/scu_base/zynq_scu_base

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/mach-zynq/pm.c b/arch/arm/mach-zynq/pm.c
index c3bc65779c566c9fe4522859a6091481e0dd6909..5a7c0200a497584513adf62e6373d13b0b2e6c38 100644 (file)
--- a/arch/arm/mach-zynq/pm.c
+++ b/arch/arm/mach-zynq/pm.c
@@ -74,10 +74,10 @@ static int zynq_pm_suspend(unsigned long arg)
        }
 
        /* SCU standby mode */
-       if (scu_base) {
-               reg = readl(scu_base + SCU_CTRL);
+       if (zynq_scu_base) {
+               reg = readl(zynq_scu_base + SCU_CTRL);
                reg |= SCU_STBY_EN_MASK;
-               writel(reg, scu_base + SCU_CTRL);
+               writel(reg, zynq_scu_base + SCU_CTRL);
        }
 
        /* Topswitch clock stop disable */
@@ -162,10 +162,10 @@ static int zynq_pm_suspend(unsigned long arg)
        xslcr_write(reg, SLCR_TOPSW_CLK_CTRL);
 
        /* SCU standby mode */
-       if (scu_base) {
-               reg = readl(scu_base + SCU_CTRL);
+       if (zynq_scu_base) {
+               reg = readl(zynq_scu_base + SCU_CTRL);
                reg &= ~SCU_STBY_EN_MASK;
-               writel(reg, scu_base + SCU_CTRL);
+               writel(reg, zynq_scu_base + SCU_CTRL);
        }
 
        /* A9 clock gating */