net: ethernet: xilinx: Add support for SGMII and 1000BASE-X phys

This patch adds support for PCS/PMA Core (SGMII and 1000BASE-X phys)
in the driver.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h
index 1c2b9b2620376f533dc527f2f7ee05f4f5547fa8..79bfcedae87df853e08224f34b17060c680e5059 100644 (file)
--- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
@@ -424,6 +424,7 @@ struct axidma_bd {
  * @coalesce_count_rx: Store the irq coalesce on RX side.
  * @coalesce_count_tx: Store the irq coalesce on TX side.
  * @phy_interface: Phy interface type.
+ * @phy_flags: Phy interface flags.
  */
 struct axienet_local {
        struct net_device *ndev;
@@ -469,6 +470,7 @@ struct axienet_local {
        u32 coalesce_count_rx;
        u32 coalesce_count_tx;
        u32 phy_interface;
+       u32 phy_flags;
 };
 
 /**

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 1fc2be49b73adf249094e754a0255f73b3e81631..b8be8206d8b8381c3d5e065ab08eab6e5641d5f1 100644 (file)
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -996,7 +996,7 @@ static int axienet_open(struct net_device *ndev)
                                                PHY_INTERFACE_MODE_RGMII_ID);
                } else {
                        phydev = of_phy_connect(lp->ndev, lp->phy_node,
-                                               axienet_adjust_link, 0,
+                                               axienet_adjust_link, lp->phy_flags,
                                                lp->phy_interface);
                }
 
@@ -1650,6 +1650,9 @@ static int axienet_probe(struct platform_device *pdev)
        if (ret < 0)
                dev_warn(&pdev->dev, "couldn't find phy i/f\n");
        lp->phy_interface = ret;
+       if (lp->phy_type == XAE_PHY_TYPE_1000BASE_X)
+               lp->phy_flags = XAE_PHY_TYPE_1000BASE_X;
+
        lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
        if (lp->phy_node) {
                ret = axienet_mdio_setup(lp, pdev->dev.of_node);