]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
PCI: xilinx-nwl: Enable the clock through CCF
authorHyun Kwon <hyun.kwon@xilinx.com>
Sat, 4 Feb 2017 02:04:07 +0000 (18:04 -0800)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 7 Feb 2017 10:10:54 +0000 (11:10 +0100)
Simply enable clocks. There is no remove function that's why
this should be enough for simple operation. Suspend/resume should be
checked.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/pci/host/pcie-xilinx-nwl.c

index 43eaa4afab9491364d660bb4ea6d07d50810cf4c..1286083e8055e78f6170e1a815f626f963893d8c 100644 (file)
@@ -10,6 +10,7 @@
  * (at your option) any later version.
  */
 
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -184,6 +185,7 @@ struct nwl_pcie {
        u8 root_busno;
        struct nwl_msi msi;
        struct irq_domain *legacy_irq_domain;
+       struct clk *clk;
 };
 
 static inline u32 nwl_bridge_readl(struct nwl_pcie *pcie, u32 off)
@@ -820,6 +822,11 @@ static int nwl_pcie_probe(struct platform_device *pdev)
                return err;
        }
 
+       pcie->clk = devm_clk_get(dev, NULL);
+       if (IS_ERR(pcie->clk))
+               return PTR_ERR(pcie->clk);
+       clk_prepare_enable(pcie->clk);
+
        err = nwl_pcie_bridge_init(pcie);
        if (err) {
                dev_err(dev, "HW Initialization failed\n");