* @isr_err_count: Count of ISR errors
* @cecc_count: Count of Correctable ECC errors (SBE)
* @uecc_count: Count of Uncorrectable ECC errors (MBE)
- * @reset_count: Count of Resets requested
* @open_count: Count of char device being opened
* @irq: IRQ number
* @xsdfec_cdev: Character device handle
atomic_t isr_err_count;
atomic_t cecc_count;
atomic_t uecc_count;
- atomic_t reset_count;
atomic_t open_count;
int irq;
struct cdev xsdfec_cdev;
return 0;
}
-/*
- * Reset will happen asynchronously
- * since there is no in-band reset register
- * Prepare driver for reset
- */
-
-static int
-xsdfec_reset_req(struct xsdfec_dev *xsdfec)
-{
- xsdfec->state = XSDFEC_INIT;
- xsdfec->config.order = XSDFEC_INVALID_ORDER;
- xsdfec->wr_protect = false;
- atomic_set(&xsdfec->isr_err_count, 0);
- atomic_set(&xsdfec->uecc_count, 0);
- atomic_set(&xsdfec->cecc_count, 0);
- atomic_inc(&xsdfec->reset_count);
- return 0;
-}
-
static int
xsdfec_clear_stats(struct xsdfec_dev *xsdfec)
{
/* In failed state allow only reset and get status IOCTLs */
if (xsdfec->state == XSDFEC_NEEDS_RESET &&
- (cmd != XSDFEC_RESET_REQ && cmd != XSDFEC_GET_STATUS)) {
+ (cmd != XSDFEC_SET_DEFAULT_CONFIG && cmd != XSDFEC_GET_STATUS &&
+ cmd != XSDFEC_GET_STATS && cmd != XSDFEC_CLEAR_STATS)) {
dev_err(xsdfec->dev,
"SDFEC%d in failed state. Reset Required",
xsdfec->config.fec_id);
case XSDFEC_STOP_DEV:
rval = xsdfec_stop(xsdfec);
break;
- case XSDFEC_RESET_REQ:
- rval = xsdfec_reset_req(xsdfec);
- break;
case XSDFEC_CLEAR_STATS:
rval = xsdfec_clear_stats(xsdfec);
break;
#define XSDFEC_START_DEV _IO(XSDFEC_MAGIC, 0)
/* ioctl to stop the device */
#define XSDFEC_STOP_DEV _IO(XSDFEC_MAGIC, 1)
-/* ioctl to communicate to the driver that device has been reset */
-#define XSDFEC_RESET_REQ _IO(XSDFEC_MAGIC, 2)
/* ioctl that returns status of sdfec device */
#define XSDFEC_GET_STATUS _IOR(XSDFEC_MAGIC, 3, struct xsdfec_status *)
/* ioctl to enable or disable irq */