]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
drm: xilinx: sdi: Adding channel number in st352 payload
authorSaurabh Sengar <saurabh.singh@xilinx.com>
Sat, 12 Aug 2017 14:08:36 +0000 (19:38 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 21 Aug 2017 07:01:56 +0000 (09:01 +0200)
Adding channel number in st352 payload.

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/gpu/drm/xilinx/xilinx_drm_sdi.c

index edcdc0ad2101364b7cfd5d5e8eb49fae7c6c64b1..664f66fe2630ce5ce191a3551529fa103d305a98 100644 (file)
 #define        XSDI_TX_MUX_16STREAM_12G                4
 
 #define PIXELS_PER_CLK                         2
+#define XSDI_CH_SHIFT                          29
 #define XST352_PROG_SHIFT                      6
 #define ST352_BYTE3                            0x00
 #define ST352_BYTE4                            0x01
@@ -952,7 +953,8 @@ static void xilinx_sdi_mode_set(struct drm_encoder *encoder,
        dev_dbg(sdi->dev, "payload : %0x\n", payload);
 
        for (i = 0; i < SDI_MAX_DATASTREAM; i++)
-               xilinx_sdi_set_payload_data(sdi, i, payload);
+               xilinx_sdi_set_payload_data(sdi, i, payload |
+                                           (i << XSDI_CH_SHIFT));
 
        /* UHDSDI is fixed 2 pixels per clock, horizontal timings div by 2 */
        vm.hactive = adjusted_mode->hdisplay / PIXELS_PER_CLK;