]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
ARM: mvebu: fix suspend to RAM on big-endian configurations
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tue, 16 Jun 2015 12:12:57 +0000 (14:12 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 10 Jul 2015 16:45:41 +0000 (09:45 -0700)
commit 2f5bc307be2480ba89e4c5d118f406f04a4a7299 upstream.

The current Armada XP suspend to RAM implementation, as added in
commit 27432825ae19f ("ARM: mvebu: Armada XP GP specific
suspend/resume code") does not handle big-endian configurations
properly: the small bit of assembly code putting the DRAM in
self-refresh and toggling the GPIOs to turn off power forgets to
convert the values to little-endian.

This commit fixes that by making sure the two values we will write to
the DRAM controller register and GPIO register are already in
little-endian before entering the critical assembly code.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fixes: 27432825ae19f ("ARM: mvebu: Armada XP GP specific suspend/resume code")
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/mach-mvebu/pm-board.c

index 6dfd4ab97b2aaf2e6982de227dd17e403dce7d24..301ab38d38ba884e194657d3e1173576b7f43ad0 100644 (file)
@@ -43,6 +43,9 @@ static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd)
        for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++)
                ackcmd |= BIT(pic_raw_gpios[i]);
 
+       srcmd = cpu_to_le32(srcmd);
+       ackcmd = cpu_to_le32(ackcmd);
+
        /*
         * Wait a while, the PIC needs quite a bit of time between the
         * two GPIO commands.