size, flags, NULL);
}
+/**
+ * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
+ * AES-GCM core.
+ * @address: Address of the AesParams structure.
+ * @out: Returned output value
+ *
+ * Return: Returns status, either success or error code.
+ */
+static int zynqmp_pm_aes_engine(const u64 address, u32 *out)
+{
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ if (!out)
+ return -EINVAL;
+
+ ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
+ lower_32_bits(address),
+ 0, 0, ret_payload);
+ *out = ret_payload[1];
+ return ret;
+}
+
/**
* zynqmp_pm_pinctrl_request - Request Pin from firmware
* @pin: Pin number to request
.clock_setparent = zynqmp_pm_clock_setparent,
.clock_getparent = zynqmp_pm_clock_getparent,
.register_access = zynqmp_pm_config_reg_access,
+ .aes = zynqmp_pm_aes_engine,
};
/**
PM_CLOCK_SETPARENT,
PM_CLOCK_GETPARENT,
PM_FPGA_READ = 46,
+ PM_SECURE_AES,
/* PM_REGISTER_ACCESS API */
PM_REGISTER_ACCESS = 52,
};
int (*clock_getparent)(u32 clock_id, u32 *parent_id);
int (*register_access)(u32 register_access_id, u32 address,
u32 mask, u32 value, u32 *out);
+ int (*aes)(const u64 address, u32 *out);
};
/*