]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
spi: spi-xilinx: passed correct structure in pm calls.
authorTejas Prajapati Rameshchandra <tejaspra@xilinx.com>
Tue, 10 Apr 2018 10:44:37 +0000 (16:14 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 23 Apr 2018 09:54:22 +0000 (11:54 +0200)
Added device structure in xspi structure and cached
&pdev->dev in it for use with pm_runtime_get_sync
in driver.

Signed-off-by: Tejas Prajapati Rameshchandra <tejaspra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/spi/spi-xilinx.c

index 8df73ed535d0c395953ac502326dc887d08c02bb..9a5dc3001a4b16aecd9a9be9f863f597f081c342 100644 (file)
@@ -88,6 +88,7 @@
  * @axi_clk:           Pointer to the AXI clock
  * @axi4_clk:          Pointer to the AXI4 clock
  * @spi_clk:           Pointer to the SPI clock
+ * @dev:               Pointer to the device
  * @rx_ptr:            Pointer to the RX buffer
  * @tx_ptr:            Pointer to the TX buffer
  * @bytes_per_word:    Number of bytes in a word
@@ -107,6 +108,7 @@ struct xilinx_spi {
        struct clk *axi_clk;
        struct clk *axi4_clk;
        struct clk *spi_clk;
+       struct device *dev;
        u8 *rx_ptr;
        const u8 *tx_ptr;
        u8 bytes_per_word;
@@ -376,16 +378,17 @@ static int xspi_setup_transfer(struct spi_device *qspi,
 static int xspi_setup(struct spi_device *qspi)
 {
        int ret;
+       struct xilinx_spi *xqspi = spi_master_get_devdata(qspi->master);
 
        if (qspi->master->busy)
                return -EBUSY;
 
-       ret = pm_runtime_get_sync(&qspi->dev);
+       ret = pm_runtime_get_sync(xqspi->dev);
        if (ret < 0)
                return ret;
 
        ret = xspi_setup_transfer(qspi, NULL);
-       pm_runtime_put_sync(&qspi->dev);
+       pm_runtime_put_sync(xqspi->dev);
 
        return ret;
 }
@@ -453,10 +456,11 @@ static int xspi_start_transfer(struct spi_master *master,
 static int xspi_prepare_transfer_hardware(struct spi_master *master)
 {
        struct xilinx_spi *xqspi = spi_master_get_devdata(master);
+
        u32 cr;
        int ret;
 
-       ret = pm_runtime_get_sync(&master->dev);
+       ret = pm_runtime_get_sync(xqspi->dev);
        if (ret < 0)
                return ret;
 
@@ -485,7 +489,7 @@ static int xspi_unprepare_transfer_hardware(struct spi_master *master)
        cr &= ~XSPI_CR_ENABLE;
        xqspi->write_fn(cr, xqspi->regs + XSPI_CR_OFFSET);
 
-       pm_runtime_put_sync(&master->dev);
+       pm_runtime_put_sync(xqspi->dev);
 
        return 0;
 }
@@ -743,6 +747,8 @@ static int xilinx_spi_probe(struct platform_device *pdev)
        if (ret < 0)
                goto clk_unprepare_all;
 
+       xspi->dev = &pdev->dev;
+
        xspi->read_fn = xspi_read32;
        xspi->write_fn = xspi_write32;
        /* Detect endianness on the IP via loop bit in CR register*/